參數(shù)資料
型號(hào): MC74HC151ADTR2G
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/7頁(yè)
文件大?。?/td> 0K
描述: IC DATA SELECT/MUX 8x1 16TSSOP
標(biāo)準(zhǔn)包裝: 2,500
系列: 74HC
類(lèi)型: 數(shù)據(jù)選擇器/多路復(fù)用器
電路: 1 x 8:1
獨(dú)立電路: 1
輸出電流高,低: 5.2mA,5.2mA
電壓電源: 單電源
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2013
May, 2013 Rev. 1
1
Publication Order Number:
MC74HC151A/D
MC74HC151A
8-Input Data
Selector/Multiplexer
HighPerformance SiliconGate CMOS
The MC74HC151 is identical in pinout to the LS151. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device selects one of the eight binary Data Inputs, as
determined by the Address Inputs. The Strobe pin must be at a low
level for the selected data to appear at the outputs. If Strobe is high, the
Y output is forced to a low level and the Y output is forced to a high
level.
The HC151 is similar in function to the HC251 which has 3state
outputs.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2 to 6 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
These are PbFree Devices
Figure 1. Logic Diagram
D0
D1
D2
D3
D4
D5
D6
D7
A0
A1
A2
STROBE
Y
DATA
OUTPUTS
DATA
INPUTS
ADDRESS
INPUTS
5
6
4
3
2
1
15
14
13
12
11
10
9
7
PIN 16 = VCC
PIN 8 = GND
http://onsemi.com
MARKING
DIAGRAMS
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
1
16
1
16
HC151AG
AWLYWW
HC
151A
ALYWG
G
1
16
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G
= PbFree Package
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
(Note: Microdot may be in either location)
13
14
15
16
9
10
11
12
5
4
3
2
1
8
7
6
D3
D0
D1
D2
STROBE
Y
GND
D7
D6
D5
D4
VCC
A1
A0
A2
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Outputs
A2
A1
A0
Strobe
Y
XXX
H
L
H
LLL
L
D0
L
H
L
D1
L
H
L
D2
L
H
L
D3
H
L
D4
H
L
H
L
D5
H
L
D6
HHH
L
D7
D0, D1, …, D7 = the level of the respective D input.
1
16
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