參數(shù)資料
型號(hào): MC74HC165ADR2
廠商: ON Semiconductor
文件頁(yè)數(shù): 1/13頁(yè)
文件大?。?/td> 0K
描述: IC SHIFT REGISTER 8BIT 16SOIC
標(biāo)準(zhǔn)包裝: 1
系列: 74HC
邏輯類型: 移位寄存器
輸出類型: 差分
元件數(shù): 1
每個(gè)元件的位元數(shù): 8
功能: 并行或串行至串行
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-SOIC
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: MC74HC165ADR2ODKR
MC74HC165ADR2ODKR-ND
MC74HC165ADR2OSDKR
Semiconductor Components Industries, LLC, 2013
April, 2013 Rev. 8
1
Publication Order Number:
MC74HC165A/D
MC74HC165A
8-Bit Serial or
Parallel-Input/
Serial-Output Shift Register
HighPerformance SiliconGate CMOS
The MC74HC165A is identical in pinout to the LS165. The device
inputs are compatible with standard CMOS outputs; with pullup
resistors, they are compatible with LSTTL outputs.
This device is an 8bit shift register with complementary outputs
from the last stage. Data may be loaded into the register either in
parallel or in serial form. When the Serial Shift/Parallel Load input is
low, the data is loaded asynchronously in parallel. When the Serial
Shift/Parallel Load input is high, the data is loaded serially on the
rising edge of either Clock or Clock Inhibit (see the Function Table).
The 2input NOR clock may be used either by combining two
independent clock sources or by designating one of the clock inputs to
act as a clock inhibit.
Features
Output Drive Capability: 10 LSTTL Loads
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 2.0 to 6.0 V
Low Input Current: 1 mA
High Noise Immunity Characteristic of CMOS Devices
In Compliance with the Requirements Defined by JEDEC Standard
No. 7 A
Chip Complexity: 286 FETs or 71.5 Equivalent Gates
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree, Halogen Free and are RoHS Compliant
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
SOIC16
D SUFFIX
CASE 751B
TSSOP16
DT SUFFIX
CASE 948F
1
16
PDIP16
N SUFFIX
CASE 648
1
16
1
16
1
16
MC74HC165AN
AWLYYWWG
1
16
HC165AG
AWLYWW
HC
165A
ALYWG
G
1
16
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G
= PbFree Package
(Note: Microdot may be in either location)
165A
ALYWG
G
QFN16
MN SUFFIX
CASE 485AW
1
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