TIMING REQUIREMENTS (CL = 50 pF," />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉(h脿o)锛� MC74HC273ADWG
寤犲晢锛� ON Semiconductor
鏂囦欢闋�(y猫)鏁�(sh霉)锛� 5/9闋�(y猫)
鏂囦欢澶у皬锛� 0K
鎻忚堪锛� IC FLIP FLOP OCT D CLOCK 20-SOIC
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绯诲垪锛� 74HC
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闋荤巼 - 鏅�(sh铆)閻橈細 35MHz
寤堕伈鏅�(sh铆)闁� - 鍌宠几锛� 25ns
瑙哥櫦(f膩)鍣ㄩ鍨嬶細 姝i倞娌�
杓稿嚭闆绘祦楂�锛屼綆锛� 7.8mA锛�7.8mA
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鐢�(ch菐n)鍝佺洰閷勯爜(y猫)闈細 1122 (CN2011-ZH PDF)
鍏跺畠鍚嶇ū锛� MC74HC273ADWG-ND
MC74HC273ADWGOS
MC74HC273A
http://onsemi.com
5
TIMING REQUIREMENTS (CL = 50 pF, Input tr = tf = 6.0 ns)
Symbol
Parameter
Figure
VCC
Volts
Guaranteed Limit
Unit
鈥� 55 to 25掳C
v 85掳C
v 125掳C
Min
Max
Min
Max
Min
Max
tsu
Minimum Setup Time, Data to Clock
3
2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
th
Minimum Hold Time, Clock to Data
3
2.0
3.0
4.5
6.0
3.0
3.0
3.0
ns
trec
Minimum Recovery Time, Reset Inactive to
Clock
2
2.0
3.0
4.5
6.0
5.0
5.0
5.0
ns
tw
Minimum Pulse Width, Clock
1
2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
tw
Minimum Pulse Width, Reset
2
2.0
3.0
4.5
6.0
60
23
12
10
75
27
15
13
90
32
18
15
ns
tr, tf
Maximum Input Rise and Fall Times
1
2.0
3.0
4.5
6.0
1000
800
500
400
1000
800
500
400
1000
800
500
400
ns
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MC74HC273ADWG 鍒堕€犲晢:ON Semiconductor 鍔熻兘鎻忚堪:LOGIC - FLIP-FLOP IC
MC74HC273ADWR2 鍔熻兘鎻忚堪:瑙哥櫦(f膩)鍣� 2-6V CMOS Octal RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闆昏矾鏁�(sh霉)閲�:2 閭忚集绯诲垪:SN74 閭忚集椤炲瀷:D-Type Flip-Flop 妤垫€�:Inverting, Non-Inverting 杓稿叆椤炲瀷:CMOS 杓稿嚭椤炲瀷: 鍌虫挱寤堕伈鏅�(sh铆)闁�:4.4 ns 楂橀浕骞宠几鍑洪浕娴�:- 16 mA 浣庨浕骞宠几鍑洪浕娴�:16 mA 闆绘簮闆诲-鏈€澶�:5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:X2SON-8 灏佽:Reel
MC74HC273ADWR2G 鍔熻兘鎻忚堪:瑙哥櫦(f膩)鍣� 2-6V CMOS Octal D-Type RoHS:鍚� 鍒堕€犲晢:Texas Instruments 闆昏矾鏁�(sh霉)閲�:2 閭忚集绯诲垪:SN74 閭忚集椤炲瀷:D-Type Flip-Flop 妤垫€�:Inverting, Non-Inverting 杓稿叆椤炲瀷:CMOS 杓稿嚭椤炲瀷: 鍌虫挱寤堕伈鏅�(sh铆)闁�:4.4 ns 楂橀浕骞宠几鍑洪浕娴�:- 16 mA 浣庨浕骞宠几鍑洪浕娴�:16 mA 闆绘簮闆诲-鏈€澶�:5.5 V 鏈€澶у伐浣滄韩搴�:+ 85 C 瀹夎棰�(f膿ng)鏍�:SMD/SMT 灏佽 / 绠遍珨:X2SON-8 灏佽:Reel
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