參數(shù)資料
型號: MC74HC368AD
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections
中文描述: HC/UH SERIES, 6-BIT DRIVER, INVERTED OUTPUT, PDSO16
封裝: PLASTIC, SOIC-16
文件頁數(shù): 3/6頁
文件大?。?/td> 151K
代理商: MC74HC368AD
MC74HC368A
High–Speed CMOS Logic Data
DL129 — Rev 6
3
MOTOROLA
(Voltages Referenced to GND)
μ
A
±
0.5
±
5.0
V
Output in High–Impedance State
Vin = VIL or VIH
Vout = VCC or GND
Iout = 0
μ
A
Maximum Three–State
Leakage Current
±
10
25 C
6.0
Current (per Package)
AC ELECTRICAL CHARACTERISTICS
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).
Symbol
b l
Parameter
V
25 C
U i
tPHZ
(Figures 2 and 4)
High–Impedance State
6.0
35
25
4.5
Maximum Propagation Delay, Input A to Output Y
2.0
95
32
53
120
145
ns
6.0
13
44
NOTES:
Maximum Propagation Delay, Output Enable to Output Y
(Figures 2 and 4)
6.0
10
41
48
Maximum Output Transition Time, Any Output
2.0
60
75
15
90
15
CPD
Power Dissipation Capacitance (Per Buffer)*
* Used to determine the no–load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the
Motorola High–Speed CMOS Data Book (DL129/D).
B ff )*
Typical @ 25
°
C, VCC = 5.0 V
40
pF
SWITCHING WAVEFORMS
VCC
GND
tf
tr
INPUT A
OUTPUT Y
10%
90%
10%
50%
tTHL
tPHL
tPLH
tTLH
OUTPUT ENABLE
OUTPUT Y
OUTPUT Y
50%
50%
50%
90%
10%
tPZL
tPLZ
tPZH
tPHZ
VCC
GND
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
Figure 1.
Figure 2.
相關(guān)PDF資料
PDF描述
MC74HC368 Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections
MC74HC368ADT Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections
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MC74HC368N Hex 3-State Inverting Buffer with Separate 2-Bit and 4-Bit Sections
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