參數(shù)資料
型號: MC74HC393A
廠商: ON SEMICONDUCTOR
元件分類: 通用總線功能
英文描述: Dual 4-Stage Binary Ripple Counter(雙4位帶2分頻及5分頻的二進制計數(shù)器)
中文描述: 雙4位的二進制紋波計數(shù)器(雙4位帶二分頻及5分頻的二進制計數(shù)器)
文件頁數(shù): 4/10頁
文件大?。?/td> 107K
代理商: MC74HC393A
MC74HC393A
http://onsemi.com
4
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
Unit
125 C
0.1
0.1
V
Test Conditions
Parameter
Symbol
0.1
85 C
25 C
6.0
|I
out
Voltage
(DL129/D).
V
Maximum LowLevel Output
V
= V
or V
2.0
0.1
0.1
0.1
V
|I
out
|
4.5
0.26
0.33
0.40
0.40
CC
Current (per Package)
Maximum Quiescent Supply
I
= 0 A
V
in
CC
A
AC ELECTRICAL CHARACTERISTICS
(C
= 50 pF, Input t
= t
= 6 ns)
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
2. Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
Symbol
PHL
Maximum Input Capacitance
Parameter
4.5
6.0
V
4.5
6.0
25 C
9
45
125 C
30
26
pF
f
Maximum Clock Frequency (50% Duty Cycle)
34
20
2.0
6.0
45
38
10
50
55
48
8
40
MHz
t
,
Maximum Propagation Delay, Clock to Q1
2.0
24
20
70
80
36
31
90
ns
t
PLH
,
4.5
Maximum Propagation Delay, Clock to Q2
44
2.0
55
100
70
105
180
PLH
6.0
Maximum Propagation Delay, Clock to Q3
44
55
65
150
105
PLH
Maximum Propagation Delay, Clock to Q4
(Figures 1 and 3)
4.5
52
250
185
65
82
PHL
Maximum Propagation Delay, Reset to any Q
(Figures 2 and 3)
4.5
16
30
19
38
50
t
THL
(Figures 1 and 3)
3.0
27
32
36
Typical @ 25
°
C, V
CC
= 5.0 V
C
PD
Power Dissipation Capacitance (Per Counter)*
* Used to determine the noload dynamic power consumption: P
D
= C
PD
V
CC2
f + I
CC
V
CC
. For load considerations, see Chapter 2 of the
ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
35
pF
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