參數(shù)資料
型號: MC74HC4050D
廠商: MOTOROLA INC
元件分類: 通用總線功能
英文描述: Hex Buffers/Logic-Level Down Converters
中文描述: HC/UH SERIES, HEX 1-INPUT NON-INVERT GATE, PDSO16
封裝: PLASTIC, SOIC-16
文件頁數(shù): 4/6頁
文件大?。?/td> 177K
代理商: MC74HC4050D
MC54/74HC4049 MC54/74HC4050
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
4
HC4049
(1/6 of the Device)
HC4050
(1/6 of the Device)
A
A
Y
Y
LOGIC DETAIL
TYPICAL APPLICATIONS
LSTTL to Low–Voltalge HSCMOS
High–Voltage CMOS to HSCMOS
IN
OUT
3 V
5 V
LSTTL
DEVICE
HC4049
HC4050
HC DEVICE
IN
OUT
VCC*
VDD*
STANDARD
CMOS
HC4049
HC4050
HC DEVICE
NOTE: To determine the noise immunity for the LSTTL to low–voltage
configuration, use Eq. 1 and Eq. 2:
(TTL) VOH – (CMOS) VIH
(TTL) VOL – (CMOS) VIL
For the supply levels shown:
2.4 – 3 (75%) = 2.4 – 2.25 = 0.15 V
0.4 – 3 (15%) = 0.4 – 0.45 = 0.05 V
Eq. 1
Eq. 2
Therefore, worst case noise immunity is 50 mV.
For supply levels greater than 4.5 volts use
the 74HCT04A for direct interface to TTL outputs.
相關(guān)PDF資料
PDF描述
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