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MC74HC4316A
http://onsemi.com
7
POSITIONWHEN TESTING tPLZ AND tPZL
Figure 10. Propagation Delay Test SetUp
ON
16
VCC
*Includes all probe and jig capacitance.
TEST
POINT
ANALOG O/I
ANALOG I/O
50 pF*
SELECTED
CONTROL
INPUT
VCC
Figure 11. Propagation Delay, ON/OFF Control
to Analog Out
ON/OFF
VCC
TEST
POINT
16
VCC
1 k
W
POSITIONWHEN TESTING tPHZ AND tPZH
50 pF*
1
2
1
2
Figure 12. Propagation Delay Test SetUp
1
2
Figure 13. Crosstalk Between Any Two Switches,
Test SetUp (Adjacent Channels Used)
RL
ON
16
*Includes all probe and jig capacitance.
OFF
RL
VIS
fin
0.1
mF
Figure 14. Power Dissipation Capacitance
Test SetUp
16
VCC
N/C
ON/OFF
A
N/C
SELECTED
CONTROL
INPUT
CONTROL
ON
16
VCC
10
mF
CL*
fin
RL
TO
DISTORTION
METER
*Includes all probe and jig capacitance.
VOS
VIS
SELECTED
CONTROL
INPUT
VCC
Figure 15. Total Harmonic Distortion, Test SetUp
7
8
9
*Includes all probe and jig capacitance.
8
9
CONTROL
OR
ENABLE
VCC
7
8
9
VEE
CL*
RL
SELECTED
CONTROL
INPUT
VCC
TEST
POINT
ANALOG I/O
7
8
9
VEE
7
8
9
VEE
50%
90%
10%
tPZL
tPLZ
tPZH
tPHZ
HIGH
IMPEDANCE
VOL
VOH
HIGH
IMPEDANCE
VCC
GND
50%
ANALOG
OUT
CONTROL
ENABLE
tr
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