DC CHARACTERISTICS (Voltages Referenced to GND) V
參數(shù)資料
型號(hào): MC74HC540AFELG
廠商: ON Semiconductor
文件頁(yè)數(shù): 4/8頁(yè)
文件大?。?/td> 0K
描述: IC INVERTER 8-INPUT 20SOEIAJ
產(chǎn)品變化通告: 1Q2012 Discontinuation 30/Mar/2012
標(biāo)準(zhǔn)包裝: 2,000
系列: 74HC
邏輯類型: 逆變器,緩沖器
電路數(shù): 1
輸入數(shù): 8
特點(diǎn): 三態(tài)
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 4µA
輸出電流高,低: 7.8mA,7.8mA
邏輯電平 - 低: 0.5 V ~ 1.8 V
邏輯電平 - 高: 1.5 V ~ 4.2 V
額定電壓和最大 CL 時(shí)的最大傳播延遲: 15ns @ 6V,50pF
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: SOEIAJ-20
封裝/外殼: 20-SOIC(0.209",5.30mm 寬)
包裝: 帶卷 (TR)
MC74HC540A
http://onsemi.com
4
DC CHARACTERISTICS (Voltages Referenced to GND)
VCC
V
Guaranteed Limit
Symbol
Parameter
Condition
55 to
25°C
≤85°C
≤125°C
Unit
VIH
Minimum HighLevel Input Voltage
Vout = 0.1 V
|Iout| ≤ 20 mA
2.0
3.0
4.5
6.0
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
1.50
2.10
3.15
4.20
V
VIL
Maximum LowLevel Input Voltage
Vout = VCC 0.1 V
|Iout| ≤ 20 mA
2.0
3.0
4.5
6.0
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
0.50
0.90
1.35
1.80
V
VOH
Minimum HighLevel Output
Voltage
Vin = VIL
|Iout| ≤ 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin = VIL
|Iout| ≤ 3.6 mA
|Iout| ≤ 6.0 mA
|Iout| ≤ 7.8 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
VOL
Maximum LowLevel Output
Voltage
Vin = VIH
|Iout| ≤ 20 mA
2.0
4.5
6.0
0.1
V
Vin = VIH
|Iout| ≤ 3.6 mA
|Iout| ≤ 6.0 mA
|Iout| ≤ 7.8 mA
3.0
4.5
6.0
0.26
0.33
0.40
Iin
Maximum Input Leakage Current
Vin = VCC or GND
6.0
±0.1
±1.0
mA
IOZ
Maximum ThreeState Leakage
Current
Output in High Impedance State
Vin = VIL or VIH
Vout = VCC or GND
6.0
±0.5
±5.0
±10.0
mA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
Iout = 0 mA
6.0
4
40
160
mA
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6 ns)
VCC
V
Guaranteed Limit
Symbol
Parameter
55 to
25°C
≤85°C
≤125°C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Input A to Output Y
(Figures 3 and 5)
2.0
3.0
4.5
6.0
80
30
18
15
100
40
23
20
120
55
28
25
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 4 and 6)
2.0
3.0
4.5
6.0
110
45
25
21
140
60
31
26
165
75
38
31
ns
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 4 and 6)
2.0
3.0
4.5
6.0
110
45
25
21
140
60
31
26
165
75
38
31
ns
tTLH,
tTHL
Maximum Output Transition Time, Any Output
(Figures 3 and 5)
2.0
3.0
4.5
6.0
60
22
12
10
75
28
15
13
90
34
18
15
ns
Cin
Maximum Input Capacitance
10
pF
Cout
Maximum 3State Output Capacitance (Output in High Impedance State)
15
pF
CPD
Power Dissipation Capacitance (Per Buffer) (Note 7)
Typical @ 25°C, VCC = 5.0 V, VEE = 0 V
pF
35
7. Used to determine the noload dynamic power consumption: PD = CPD VCC2f + ICC VCC.
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