參數(shù)資料
型號: MC74HC541A
廠商: ON SEMICONDUCTOR
英文描述: Octal 3 State Noninverting Buffer/Line Driver/Line Receiver(八總線緩沖器(三態(tài)同相輸出))
中文描述: 八路3國同相緩沖器/線路驅(qū)動器/線接收器(八總線緩沖器(三態(tài)同相輸出))
文件頁數(shù): 4/10頁
文件大小: 121K
代理商: MC74HC541A
MC74HC541A
http://onsemi.com
4
DC CHARACTERISTICS
(Voltages Referenced to GND)
Guaranteed Limit
Symbol
Parameter
Condition
V
CC
V
55 to
25 C
85 C
125 C
Unit
V
IH
Minimum HighLevel Input Voltage
V
OUT
= 0.1 V
|I
OUT
|
20 A
2.0
3.0
4.5
6.0
2.0
3.0
4.5
6.0
2.0
4.5
6.0
1.50
2.10
3.15
4.20
0.50
0.90
1.35
1.80
1.9
4.4
5.9
1.50
2.10
3.15
4.20
0.50
0.90
1.35
1.80
1.9
4.4
5.9
1.50
2.10
3.15
4.20
0.50
0.90
1.35
1.80
1.9
4.4
5.9
V
V
IL
Maximum LowLevel Input Voltage
V
OUT
= V
CC
0.1 V
|I
OUT
|
20 A
V
V
OH
Minimum HighLevel Output Voltage
V
IN
= V
|I
OUT
|
20 A
V
V
IN
= V
IL
|I
OUT
|
3.6 mA
|I
OUT
|
6.0 mA
|I
OUT
|
7.8 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.20
3.70
5.20
V
OL
Maximum LowLevel Output Voltage
V
IN
= V
|I
OUT
|
20 A
2.0
4.5
6.0
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
0.1
V
V
IN
= V
IH
|I
OUT
|
3.6 mA
|I
OUT
|
6.0 mA
|I
OUT
|
7.8 mA
3.0
4.5
6.0
0.26
0.26
0.26
0.33
0.33
0.33
0.40
0.40
0.40
I
IN
I
OZ
Maximum Input Leakage Current
Maximum 3State Leakage Current
V
IN
= V
CC
or GND
Output in High Impedance State
V
IN
= V
IL
or V
IH
V
OUT
= V
CC
or GND
V
IN
= V
CC
or GND
I
OUT
= 0 A
6.0
6.0
0.1
0.5
1.0
5.0
1.0
10.0
A
A
I
CC
Maximum Quiescent Supply
Current (per Package)
8. Information on typical parametric values can be found in the ON Semiconductor HighSpeed CMOS Data Book (DL129/D).
6.0
4
40
160
A
AC CHARACTERISTICS
(C
L
= 50 pF, Input t
r
= t
f
= 6 ns)
Guaranteed Limit
Symbol
Parameter
V
CC
V
55 to
25 C
85 C
125 C
Unit
t
PLH
,
t
PHL
Maximum Propagation Delay, Input A to Output Y
(Figures 3 and 5)
2.0
3.0
4.5
6.0
2.0
3.0
4.5
6.0
2.0
3.0
4.5
6.0
2.0
3.0
4.5
6.0
80
30
18
15
110
45
25
21
110
45
25
21
60
22
12
10
10
15
100
40
23
20
140
60
31
26
140
60
31
26
75
28
15
13
10
15
120
55
28
25
165
75
38
31
165
75
38
31
90
34
18
15
10
15
ns
t
PLZ
,
t
PHZ
Maximum Propagation Delay, Output Enable to Output Y
(Figures 4 and 6)
ns
t
PZL
,
t
PZH
Maximum Propagation Delay, Output Enable to Output Y
(Figures 4 and 6)
ns
t
TLH
,
t
THL
Maximum Output Transition Time, Any Output
(Figures 3 and 5)
ns
C
IN
C
OUT
9. For propagation delays with loads other than 50 pF, and information on typical parametric values, see the ON Semiconductor HighSpeed
CMOS Data Book (DL129/D).
Maximum Input Capacitance
Maximum 3State Output Capacitance (High Impedance State Output)
pF
pF
Typical @ 25
°
C, V
CC
= 5.0 V, V
EE
= 0 V
35
C
PD
Power Dissipation Capacitance (Per Buffer) (Note 10)
10.Used to determine the noload dynamic power consumption: P
D
= C
PD
V
CC2
f + I
CC
V
CC
. For load considerations, see the ON
Semiconductor HighSpeed CMOS Data Book (DL129/D).
pF
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