DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND) Symbol Unit G" />
參數(shù)資料
型號: MC74HC595ADTG
廠商: ON Semiconductor
文件頁數(shù): 7/12頁
文件大?。?/td> 0K
描述: IC SHIFT REGISTER 8BIT 16-TSSOP
標(biāo)準(zhǔn)包裝: 96
系列: 74HC
邏輯類型: 移位寄存器
輸出類型: 三態(tài)
元件數(shù): 1
每個元件的位元數(shù): 8
功能: 串行至并行
電源電壓: 2 V ~ 6 V
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 16-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 16-TSSOP
包裝: 管件
產(chǎn)品目錄頁面: 1123 (CN2011-ZH PDF)
其它名稱: MC74HC595ADTG-ND
MC74HC595ADTGOS
MC74HC595A
http://onsemi.com
4
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
Symbol
Unit
Guaranteed Limit
VCC
V
Test Conditions
Parameter
Symbol
Unit
v 125_C
v 85_C
– 55 to 25_C
VCC
V
Test Conditions
Parameter
VOL
Maximum LowLevel Output
Voltage, QA QH
Vin = VIH or VIL
|Iout| v 20 mA
2.0
4.5
6.0
0.1
V
Vin = VIH or VIL
|Iout| v 2.4 mA
|Iout| v 6.0 mA
|Iout| v 7.8 mA
3.0
4.5
6.0
0.26
0.33
0.4
VOH
Minimum HighLevel Output
Voltage, SQH
Vin = VIH or VIL
IIoutI v 20 mA
2.0
4.5
6.0
1.9
4.4
5.9
1.9
4.4
5.9
1.9
4.4
5.9
V
Vin = VIH or VIL
|Iout| v 2.4 mA
IIoutI v 4.0 mA
IIoutIv 5.2 mA
3.0
4.5
6.0
2.48
3.98
5.48
2.34
3.84
5.34
2.2
3.7
5.2
VOL
Maximum LowLevel Output
Voltage, SQH
Vin = VIH or VIL
IIoutI v 20 mA
2.0
4.5
6.0
0.1
V
Vin = VIH or VIL
|Iout| v 2.4 mA
IIoutI v 4.0 mA
IIoutIv 5.2 mA
3.0
4.5
6.0
0.26
0.33
0.4
Iin
Maximum Input Leakage
Current
Vin = VCC or GND
6.0
± 0.1
± 1.0
mA
IOZ
Maximum ThreeState
Leakage
Current, QA QH
Output in HighImpedance State
Vin = VIL or VIH
Vout = VCC or GND
6.0
± 0.5
± 5.0
± 10
mA
ICC
Maximum Quiescent Supply
Current (per Package)
Vin = VCC or GND
lout = 0 mA
6.0
4.0
40
160
mA
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6.0 ns)
Symbol
Parameter
VCC
V
Guaranteed Limit
Unit
– 55 to 25_C
v 85_C
v 125_C
fmax
Maximum Clock Frequency (50% Duty Cycle)
(Figures 1 and 7)
2.0
3.0
4.5
6.0
15
30
35
4.8
10
24
28
4.0
8.0
20
24
MHz
tPLH,
tPHL
Maximum Propagation Delay, Shift Clock to SQH
(Figures 1 and 7)
2.0
3.0
4.5
6.0
140
100
28
24
175
125
35
30
210
150
42
36
ns
tPHL
Maximum Propagation Delay, Reset to SQH
(Figures 2 and 7)
2.0
3.0
4.5
6.0
145
100
29
25
180
125
36
31
220
150
44
38
ns
tPLH,
tPHL
Maximum Propagation Delay, Latch Clock to QA QH
(Figures 3 and 7)
2.0
3.0
4.5
6.0
140
100
28
24
175
125
35
30
210
150
42
36
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Output Enable to QA QH
(Figures 4 and 8)
2.0
3.0
4.5
6.0
150
100
30
26
190
125
38
33
225
150
45
38
ns
tPZL,
tPZH
Maximum Propagation Delay, Output Enable to QA QH
(Figures 4 and 8)
2.0
3.0
4.5
6.0
135
90
27
23
170
110
34
29
205
130
41
35
ns
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