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參數(shù)資料
| 型號(hào)： | MC74HC597N |
| 廠商： | MOTOROLA INC |
| 元件分類： | 通用總線功能 |
| 英文描述： | 8-Bit Serial or Parallel-Input/Serial-Output Shift Register with Input Latch |
| 中文描述： | HC/UH SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁(yè)數(shù)： | 6/11頁(yè) |
| 文件大?。?/td> | 291K |
| 代理商： | MC74HC597N |
MC54/74HC597A
MOTOROLA
High–Speed CMOS Logic Data
DL129 — Rev 6
6
FUNCTION TABLE
Operation
Inputs
Resulting Function
Shift
Register
Contents
Reset
L
L
Serial Shift/
Parallel Load
Latch
Clock
Shift
Clock
Serial
Input
SA
X
X
Parallel
Inputs
A–H
Latch
Contents
Output
QH
L
L
Reset shift register
Reset shift register; load
parallel data into data latch
X
X
L, H,
X
X
X
U
L
L
a–h
a–h
Load parallel data into data
latch
H
H
L,H,
X
a–h
a–h
U
U
Transfer latch contents to
shift register
H
L
L, H,
X
X
X
U
LRN
→
SRN
LRH
Contents of data latch and
shift register are
unchanged
H
H
L, H,
L,H,
X
X
U
U
U
Load parallel data into data
latch and shift register
H
L
X
X
a–h
a–h
a–h
h
Shift serial data into shift
register
H
H
X
D
X
*
SRA = D;
SRN
→
SRN+1
SRA = D;
SRN
→
SRN+1
SRG
→
SRH
Load parallel data into data
latch and shift serial data
into shift register
H
H
D
a–h
a–h
SRG
→
SRH
LR = latch register contents
SR = shift register contents
* = depends on latch clock input
a–h = data at parallel data inputs A–H
D = data (L, H) at serial data input SA
U = remains unchanged
X = don’t care
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