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參數(shù)資料
型號: MC74HCT32ADG
廠商: ON Semiconductor
文件頁數(shù): 2/8頁
文件大?。?/td> 0K
描述: IC GATE OR QUAD 2INPUT 14SOIC
標(biāo)準(zhǔn)包裝: 55
系列: 74HCT
邏輯類型: 或門
電路數(shù): 4
輸入數(shù): 2
電源電壓: 2 V ~ 6 V
電流 - 靜態(tài)(最大值): 1µA
輸出電流高,低: 4mA,4mA
邏輯電平 - 低: 0.8V
邏輯電平 - 高: 2V
額定電壓和最大 CL 時的最大傳播延遲: 15ns @ 5V,50pF
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 14-SOICN
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
包裝: 管件
MC74HCT32A
http://onsemi.com
2
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
–0.5 to +7.0
V
Vin
DC Input Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
Vout
DC Output Voltage (Referenced to GND)
–0.5 to VCC +0.5
V
Iin
DC Input Current, per Pin
±20
mA
Iout
DC Output Current, per Pin
±25
mA
ICC
DC Supply Current, VCC and GND Pins
±50
mA
PD
Power Dissipation in Still Air,
Plastic DIP
SOIC Package
TSSOP Package
750
500
450
mW
Tstg
Storage Temperature
–65 to +150
°C
TL
Lead Temperature, 1 mm from Case for 10 Seconds
Plastic DIP, SOIC or TSSOP Package
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress
ratings only. Functional operation above the Recommended Operating Conditions is not implied.
Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Derating Plastic DIP: – 10 mW/°C from 65° to 125°C
SOIC Package: – 7 mW/°C from 65° to 125°C
TSSOP Package: 6.1 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
VCC
DC Supply Voltage (Referenced to GND)
2.0
6.0
V
Vin, Vout DC Input Voltage, Output Voltage (Referenced to GND)
0
VCC
V
TA
Operating Temperature, All Package Types
–55
+125
°C
tr, tf
Input Rise and Fall Time
VCC = 2.0 V
(Figure 1)
VCC = 4.5 V
VCC = 6.0 V
0
1000
500
400
ns
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, Vin and
Vout should be constrained to the
range GND v (Vin or Vout) v VCC.
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or VCC).
Unused outputs must be left open.
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