參數(shù)資料
型號: MC74LCX125DR2
廠商: ON Semiconductor
文件頁數(shù): 1/7頁
文件大?。?/td> 0K
描述: IC BUFF TRI-ST QD LV CMOS 14SOIC
產(chǎn)品變化通告: Product Obsolescence 11/Feb/2009
標(biāo)準(zhǔn)包裝: 2,500
系列: 74LCX
邏輯類型: 緩沖器/線路驅(qū)動器,非反相
元件數(shù): 4
每個元件的位元數(shù): 1
輸出電流高,低: 24mA,24mA
電源電壓: 2 V ~ 3.6 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 14-SOIC(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 14-SOICN
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2012
October, 2012 Rev. 8
1
Publication Order Number:
MC74LCX125/D
MC74LCX125
Low-Voltage CMOS
Quad Buffer
With 5 VTolerant Inputs and Outputs
(3State, NonInverting)
The MC74LCX125 is a high performance, noninverting quad
buffer operating from a 2.3 to 3.6 V supply. High impedance TTL
compatible inputs significantly reduce current loading to input drivers
while TTL compatible outputs offer improved switching noise
performance. A VI specification of 5.5 V allows MC74LCX125 inputs
to be safely driven from 5.0 V devices. The MC74LCX125 is suitable
for memory address driving and all TTL level bus oriented transceiver
applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a
HIGH Z condition.
Features
Designed for 2.3 to 3.6 V VCC Operation
5.0 V Tolerant Interface Capability With 5.0 V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0 V
LVTTL Compatible
LVCMOS Compatible
24 mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in all Three Logic States (10 mA)
Substantially Reduces System Power Requirements
Latchup Performance Exceeds 500 mA
ESD Performance:
Human Body Model >2000 V
Machine Model >200 V
NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AECQ100
Qualified and PPAP Capable
These Devices are PbFree, Halogen Free/BFR Free and are RoHS
Compliant
MARKING
DIAGRAMS
TSSOP14
DT SUFFIX
CASE 948G
14
1
SOIC14
D SUFFIX
CASE 751A
14
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
LCX125G
AWLYWW
1
14
LCX
125
ALYWG
G
1
14
A
= Assembly Location
L, WL
= Wafer Lot
Y, YY
= Year
W, WW = Work Week
G or G
= PbFree Package
(Note: Microdot may be in either location)
相關(guān)PDF資料
PDF描述
TXR40AB00-0804AI ADPT TINEL LOCK STR SHELL 9, A
TXR40AB90-0804AI ADPT TINEL LOCK ANG SHELL 9, A
MC74LCX125D IC BUFF TRI-ST QD LV CMOS 14SOIC
TXR40AB00-1410AI ADPT TINEL LOCK STR SHELL 15, D
TXR40AB00-1406AI ADPT TINEL LOCK STR SHELL 15, D
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