參數(shù)資料
型號: MC74VHC540DTR2G
廠商: ON Semiconductor
文件頁數(shù): 1/7頁
文件大?。?/td> 0K
描述: IC INVERTER 8-INPUT 20TSSOP
標準包裝: 2,500
系列: 74VHC
邏輯類型: 逆變器,緩沖器
電路數(shù): 1
輸入數(shù): 8
特點: 三態(tài)
電源電壓: 2 V ~ 5.5 V
電流 - 靜態(tài)(最大值): 4µA
輸出電流高,低: 8mA,8mA
邏輯電平 - 低: 0.5V
邏輯電平 - 高: 1.5V
額定電壓和最大 CL 時的最大傳播延遲: 7ns @ 5V,50pF
工作溫度: -55°C ~ 125°C
安裝類型: 表面貼裝
供應(yīng)商設(shè)備封裝: 20-TSSOP
封裝/外殼: 20-TSSOP(0.173",4.40mm 寬)
包裝: 帶卷 (TR)
Semiconductor Components Industries, LLC, 2011
May, 2011 Rev. 5
1
Publication Order Number:
MC74VHC540/D
MC74VHC540
Octal Bus Buffer
Inverting
The MC74VHC540 is an advanced high speed CMOS inverting
octal bus buffer fabricated with silicon gate CMOS technology. It
achieves high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining CMOS low power dissipation.
The MC74VHC540 features inputs and outputs on opposite sides
of the package and two ANDed activelow output enables. When
either OE1 or OE2 are high, the terminal outputs are in the high
impedance state.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
High Speed: tPD = 3.7 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 4.0 μA (Max) at TA = 25°C
High Noise Immunity: VNIH = VNIL = 28% VCC
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 1.2 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: HBM > 2000 V; Machine Model > 200 V
Chip Complexity: 124 FETs or 31 Equivalent Gates
These Devices are PbFree and are RoHS Compliant
18
Y1
2
A1
17
Y2
3
A2
16
Y3
4
A3
15
Y4
5
A4
14
Y5
6
A5
13
Y6
7
A6
12
Y7
8
A7
11
Y8
9
A8
OE1
OE2
1
19
OUTPUT
ENABLES
DATA
INPUTS
INVERTING
OUTPUTS
Figure 1. Logic Diagram
SOIC20
DW SUFFIX
CASE 751D
1
A
= Assembly Location
WL, L = Wafer Lot
YY, Y
= Year
WW, W = Work Week
G or G = PbFree Package
http://onsemi.com
20
MARKING
DIAGRAMS
VHC540
AWLYYWWG
TSSOP20
DT SUFFIX
CASE 948E
1
20
VHC
540
ALYWG
G
L
H
X
L
X
H
L
H
X
FUNCTION TABLE
Inputs
Output Y
OE1
OE2
A
H
L
Z
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
A5
A3
A2
A1
OE1
GND
A8
A7
A6
A4
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Y3
Y2
Y1
OE2
VCC
Y8
Y7
Y6
Y5
Y4
PIN ASSIGNMENT
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