參數(shù)資料
型號: MC74VHCT541A
廠商: ON SEMICONDUCTOR
英文描述: Octal Bus Buffer(八總線緩沖器(三態(tài)同相輸出))
中文描述: 八路總線緩沖器(八總線緩沖器(三態(tài)同相輸出))
文件頁數(shù): 2/6頁
文件大小: 104K
代理商: MC74VHCT541A
MC74VHCT541A
http://onsemi.com
2
18
Y1
2
A1
17
Y2
3
A2
16
Y3
4
A3
15
Y4
5
A4
14
Y5
6
A5
13
Y6
7
A6
12
Y7
8
A7
11
Y8
9
A8
OE1
OE2
1
19
OUTPUT
ENABLES
DATA
INPUTS
NONINVERTING
OUTPUTS
Figure 1. Logic Diagram
Figure 2. Pin Assignment
A5
A3
A2
A1
OE1
GND
A8
A7
A6
A4
5
4
3
2
1
10
9
8
7
6
14
15
16
17
18
19
20
11
12
13
Y3
Y2
Y1
OE2
V
CC
Y8
Y7
Y6
Y5
Y4
not valid simultaneously. If these limits are exceeded, device functional operation is not implied,
damage may occur and reliability may be affected.
Derating
SOIC Packages: – 7 mW/ C from 65 to 125 C
TSSOP Package: 6.1 mW/ C from 65 to 125 C
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
CC
in
out
TSSOP Package
450
Maximum ratings are those values beyond which device damage can occur. Maximum ratings
T
stg
Storage Temperature
– 65 to + 150
C
RECOMMENDED OPERATING CONDITIONS
V
DC Supply Voltage
V
DC Input Voltage
4.5
0
0
5.5
5.5
CC
V
V
V
out
DC Output Voltage
A
Outputs in 3State
r
f
C
CC
This device contains protection
circuitry to guard against damage
due to high static voltages or electric
fields. However, precautions must
be taken to avoid applications of any
voltage higher than maximum rated
voltages to this highimpedance cir-
cuit. For proper operation, V
in
and
V
out
should be constrained to the
range GND
(V
in
or V
out
)
Unused inputs must always be
tied to an appropriate logic voltage
level (e.g., either GND or V
CC
).
Unused outputs must be left open.
V
CC
.
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