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| 型號(hào)： | MC80C0216Q |
| 廠商： | Electronic Theatre Controls, Inc. |
| 元件分類： | 8位微控制器 |
| 英文描述： | 8-BIT SINGLE-CHIP MICROCONTROLLERS |
| 中文描述： | 8位單晶片微控制器 |
| 文件頁(yè)數(shù)： | 108/128頁(yè) |
| 文件大?。?/td> | 1408K |
| 代理商： | MC80C0216Q |
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MC80F0208/16/24
Preliminary
104
MAR. 2005 Ver 0.2
23. RESET
The MC80F0208/16/24 have four types of reset generation pro-
cedures; they are an external reset input, a watch-dog timer reset,
power fail processor reset, and address fail reset. Table 23-1
shows on-chip hardware initialization by reset action.
Table 23-1 Initializing Internal Status by Reset Action
External Reset Input
The reset input is the RESET pin, which is the input to a Schmitt
Trigger. A reset in accomplished by holding the RESET pin low
for at least 8 oscillator periods, within the operating voltage range
and oscillation stable, it is applied, and the internal state is initial-
ized. After reset, 65.5ms (at 4 MHz) add with 7 oscillator periods
are required to start execution as shown in Figure 23-2.
Internal RAM is not affected by reset. When V
DD
is turned on,
the RAM content is indeterminate. Therefore, this RAM should
be initialized before read or tested it.
When the RESET pin input goes to high, the reset operation is re-
leased and the program execution starts at the vector address
stored at addresses FFFE
H
- FFFF
H
.
A connection for simple power-on-reset is shown in Figure 23-1.
Figure 23-1 Simple Power-on-Reset Circuit
Figure 23-2 Timing Diagram after Reset
Address Fail Reset
The Address Fail Reset is the function to reset the system by
checking code access of abnormal and unwished address caused
by erroneous program code itself or external noise, which could
not be returned to normal operation and would become malfunc-
tion state. If the CPU tries to fetch the instruction from ineffective
code area or RAM area, the address fail reset is occurred. Please
refer to Figure 11-2 for setting address fail option.
On-chip Hardware
Initial Value
On-chip Hardware
Initial Value
Program counter
(PC)
(FFFF
H
) - (FFFE
H
)
Peripheral clock
Off
RAM page register
(RPR)
0
Watchdog timer
Disable
G-flag
(G)
0
Control registers
Refer to Table 8-1 on page 27
Operation mode
Main-frequency clock
Power fail detector
Disable
7036P
V
CC
10uF
+
10k
to the RESET pin
MAIN PROGRAM
Oscillator
(X
IN
pin)
FFFE FFFF
Stabilization Time
t
ST
=65.5mS at 4MHz
RESET
ADDRESS
BUS
DATA
BUS
1
2
3
4
5
6
7
Start
FE
ADL
ADH
OP
Reset Process Step
~
~
~
~
~
~
t
ST
=
x 256
f
XIN
÷
1024
1
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| MC80C0224 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS |
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| MC80C0424K | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SINGLE-CHIP MICROCONTROLLERS |
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