參數(shù)資料
型號： MC8641THX1000GC
廠商： Freescale Semiconductor
文件頁數(shù)： 42/130頁
文件大?。?/td> 0K
描述： MPU E600 SGL CORE 994-FCCBGA
標準包裝： 1
系列： MPC86xx
處理器類型： 32-位 MPC86xx PowerPC
速度： 1.0GHz
電壓： 1.05V
安裝類型： 表面貼裝
封裝/外殼： 994-BCBGA，F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝： 994-FCCBGA（33x33）
包裝： 托盤
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
19
Input Clocks
NOTE
The phase between the output clocks TSEC1_GTX_CLK and
TSEC2_GTX_CLK (ports 1 and 2) is no more than 100 ps. The phase
between the output clocks TSEC3_GTX_CLK and TSEC4_GTX_CLK
(ports 3 and 4) is no more than 100 ps.
4.4
Platform Frequency Requirements for PCI-Express and Serial
RapidIO
The MPX platform clock frequency must be considered for proper operation of the high-speed PCI
Express and Serial RapidIO interfaces as described below.
For proper PCI Express operation, the MPX clock frequency must be greater than or equal to:
527 MHz x (PCI-Express link width)
16 / (1 + cfg_plat_freq)
Note that at MPX = 400 MHz, cfg_plat_freq = 0 and at MPX > 400 MHz, cfg_plat_freq = 1. Therefore,
when operating PCI Express in x8 link width, the MPX platform frequency must be 400 MHz with
cfg_plat_freq = 0 or greater than or equal to 527 MHz with cfg_plat_freq = 1.
For proper Serial RapidIO operation, the MPX clock frequency must be greater than:
2 × (0.80) × (Serial RapidIO interface frequency) × (Serial RapidIO link width)
64
4.5
Other Input Clocks
For information on the input clocks of other functional blocks of the platform such as SerDes, and eTSEC,
see the specific section of this document.
EC
n_GTX_CLK125 duty cycle
GMII, TBI
1000Base-T for RGMII, RTBI
tG125H/tG125
45
47
—
55
53
%1, 2
Notes:
1. Timing is guaranteed by design and characterization.
2. EC
n_GTX_CLK125 is used to generate the GTX clock for the eTSEC transmitter with 2% degradation.
EC
n_GTX_CLK125 duty cycle can be loosened from 47/53% as long as the PHY device can tolerate the duty cycle
generated by the eTSEC GTX_CLK. See Section 8.2.6, “RGMII and RTBI AC Timing Specifications,” for duty cycle
for 10Base-T and 100Base-T reference clock.
3. ±100 ppm tolerance on EC
n_GTX_CLK125 frequency
Table 10. EC
n_GTX_CLK125 AC Timing Specifications (continued)
Parameter/Condition
Symbol
Min
Typical
Max
Unit
Notes
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