參數(shù)資料
型號: MC8641TVU1000NC
廠商: Freescale Semiconductor
文件頁數(shù): 98/130頁
文件大小: 0K
描述: MPU E600 SGL CORE 994-FCCBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.0GHz
電壓: 0.95V
安裝類型: 表面貼裝
封裝/外殼: 994-BCBGA,F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝: 994-FCCBGA(33x33)
包裝: 托盤
MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
7
Electrical Characteristics
2.1.2
Recommended Operating Conditions
Table 2 provides the recommended operating conditions for the MPC8641. Note that the values in Table 2
are the recommended and tested operating conditions. Proper device operation outside of these conditions
is not guaranteed. For details on order information and specific operating conditions for parts, see
Input voltage
DDR and DDR2 SDRAM signals
D
n
_MVIN
– 0.3 to (D
n_GVDD +
0.3)
V5
DDR and DDR2 SDRAM reference
D
n
_MV
REF
– 0.3 to (D
n_GVDD/2 +
0.3)
V—
Three-speed Ethernet signals
LVIN
TVIN
GND to (LVDD+ 0.3)
GND to (TVDD+ 0.3)
V
5
DUART, Local Bus, DMA,
Multiprocessor Interrupts, System
Control & Clocking, Debug, Test,
Power management, I2C, JTAG and
Miscellaneous I/O voltage
OVIN
GND to (OVDD+ 0.3)
V
5
Storage temperature range
TSTG
–55 to 150
C
C—
Notes:
1. Functional and tested operating conditions are given in Table 2. Absolute maximum ratings are stress ratings only, and
functional operation at the maxima is not guaranteed. Stresses beyond those listed may affect device reliability or cause
permanent damage to the device.
2. Core 1 characteristics apply only to MPC8641D. If two separate power supplies are used for VDD_Core0 and VDD_Core1,
they must be kept within 100 mV of each other during normal run time.
3. The –0.3 to 2.75 V range is for DDR and –0.3 to 1.98 V range is for DDR2.
4. The 3.63V maximum is only supported when the port is configured in GMII, MII, RMII, or TBI modes; otherwise the 2.75V
the recommended operating conditions per protocol.
5. During run time (M,L,T,O)VIN and Dn_MVREF may overshoot/undershoot to a voltage and for a maximum duration as shown
Table 2. Recommended Operating Conditions
Characteristic
Symbol
Recommended
Value
Unit
Notes
Cores supply voltages
VDD_Core0,
VDD_Core1
1.10 ± 50 mV
V
1, 2, 8
1.05 ± 50 mV
1, 2, 7
0.95 ± 50 mV
1, 2, 12
Cores PLL supply
AVDD_Core0,
AVDD_Core1
1.10 ± 50 mV
V
8, 13
1.05 ± 50 mV
7, 13
0.95 ± 50 mV
12, 13
SerDes Transceiver Supply (Ports 1 and 2)
SVDD
1.10 ± 50 mV
V
8, 11
1.05 ± 50 mV
7, 11
Table 1. Absolute Maximum Ratings1 (continued)
Characteristic
Symbol
Absolute Maximum
Value
Unit
Notes
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