參數(shù)資料
型號(hào): MC8641VU1333JC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 30/130頁(yè)
文件大?。?/td> 0K
描述: IC MPU SGL E600 CORE 994FCCBGA
標(biāo)準(zhǔn)包裝: 1
系列: MPC86xx
處理器類型: 32-位 MPC86xx PowerPC
速度: 1.333GHz
電壓: 1.05V
安裝類型: 表面貼裝
封裝/外殼: 994-BCBGA,F(xiàn)CCBGA
供應(yīng)商設(shè)備封裝: 994-FCCBGA(33x33)
包裝: 托盤(pán)
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MPC8641 and MPC8641D Integrated Host Processor Hardware Specifications, Rev. 2
Freescale Semiconductor
125
System Design Information
Figure 68. JTAG/COP Interface Connection for one MPC8641 device
HRESET
From Target
Board Sources
COP_HRESET
13
COP_SRESET
SRESET1
NC
11
COP_VDD_SENSE2
6
5
15
10
Ω
10 k
Ω
10 k
Ω
COP_CHKSTP_IN
CKSTP_IN
8
COP_TMS
COP_TDO
COP_TDI
COP_TCK
TMS
TDO
TDI
9
1
3
4
COP_TRST
7
16
2
10
12
(if any)
CO
P
Head
er
14 3
3. The KEY location (pin 14) is not physically present on the COP header.
10 k
Ω
TRST1
10 k
Ω
10 k
Ω
10 k
Ω
CKSTP_OUT
COP_CHKSTP_OUT
3
13
9
5
1
6
10
15
11
7
16
12
8
4
KEY
No pin
COP Connector
Physical Pinout
1
2
NC
SRESET1
NC
OVDD
10 k
Ω
10 k
Ω
HRESET1
4. Although pin 12 is defined as a No-Connect, some debug tools may use pin 12 as an additional GND pin for
improved signal integrity.
TCK
4
5
5. This switch is included as a precaution for BSDL testing. The switch should be open during BSDL testing to avoid
accidentally asserting the TRST line. If BSDL testing is not being performed, this switch should be closed or removed.
10 k
Ω
SRESET0
10 k
Ω
SRESET0
2. Populate this with a 10
Ω resistor for short-circuit/current-limiting protection.
1. The COP port and target board should be able to independently assert HRESET and TRST to the processor
in order to fully control the processor as shown here.
Notes:
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