Revision History
MC68HC908QL4 MC68HC908QL3 MC68HC908QL2 Data Sheet, Rev. 4
4
Freescale Semiconductor
March,
2004
2.0
Figure 2-2. Control, Status, and Data Registers
Corrected reset state for the FLASH Block Protect Register.
Corrected reset value for the Internal Oscillator Time Value
33
34
Table 7-1. Instruction Set Summary — Added WAIT instruction
83
11.8.1 Oscillator Status and Control Register — Revised description of
ECGON bit for clarity
117
Table 13-3. Interrupt Sources — Corrected address locations for SLIC,
KBI, and ADC
140
14.3.5 SLIC Wait (Core Specific) — Revised description for clarity
144
14.3.7 SLIC Stop (Core Specific) — Revised description for clarity
144
14.6.6.2 Byte Transfer Mode Operation — Revised definition of Receiver
Buffer Overrun Error
156
14.7.1 LIN Message Frame Header — Revised third paragraph of
description
161
14.14 Sleep and Wakeup Operation — Revised second paragraph of
description
174
15.8 Input/Output Signals — Corrected reference from PTA0/TCH) to
PTB0/TCH0
196
15.8.2 TIM Channel I/O Pins (PTB0/TCH0 and PTA1/TCH1) —
Corrected reference to from PTA0/TCH) to PTB0/TCH0
196
Figure 16-1. Block Diagram Highlighting BRK and MON Blocks — Added
206
17.5 5-V DC Electrical Characteristics — Updated table notes
227
17.8 5-V Oscillator Characteristics — Updated table notes
230
17.9 3.3-V DC Electrical Characteristics — Updated table notes
231
June,
2004
3.0
Modular sections reworked for clarity.
Throughout
December,
2004
4.0
Updated to final Freescale format. Corrections per email review.
Replaced ADC chapter with latest.
Throughout
Table 1-3. Function Priority in Shared Pins
— Updated entry for PTA2
23
Figure 1-2. MCU Pin Assignments
— Corrected pin assignments for the
TSSOP packages.
21
17.11 Oscillator Characteristics
— Updated deviation from trimmed
internal oscillator specifications.
210
17.8 3.3-V DC Electrical Characteristics
— Corrected capacitance values
208
17.11 Oscillator Characteristics
— Corrected Note 8
211
Revision History (Sheet 2 of 2)
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Revision
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