參數資料
型號： MC92600JUB
廠商： MOTOROLA INC
元件分類： 微控制器/微處理器
英文描述： SPECIALTY MICROPROCESSOR CIRCUIT, PBGA217
封裝： 23 X 23 MM, 2.32 MM HEIGHT, 1.27 MM PITCH, PLASTIC, BGA-217
文件頁數： 19/98頁
文件大?。?/td> 1018K
代理商： MC92600JUB
2-6
MC92600 SERDES User’s Manual
MOTOROLA
Types of Transmission Data
The transmitter inputs, XMIT_x_7–XMIT_x_0, XMIT_x_K and XMIT_x_IDLE are
ignored for the next 15 byte-times while the sequence is transmitted.
NOTE
The transmitter control signals WSE_GEN and XMIT_x_K
also affect the receiver. When WSE_GEN is high and
XMIT_x_K is low on all four links, the receiver invalidates its
current byte alignment and word synchronization. See
information on this function.
2.4.2
Transmitting Coded Data
10-bit coded data may be transmitted, bypassing the internal 8B/10B encoder. 10-bit
interface (TBI) mode is enabled by asserting TBIE. In this mode, the ten bits of data to
transmit are presented on the XMIT_x_7–XMIT_x_0 inputs, and bits 8 and 9 on the
XMIT_x_K and XMIT_x_IDLE inputs, respectively.
Special care must be taken when using TBI mode. The 10-bit data must exhibit the same
properties as 8B/10B coded data. DC balance must be maintained and there must be
sufcient transition density to ensure reliable data recovery at the receiver. The receiver
requires that the K28.5 idle character be periodically transmitted to enable byte and word
synchronization. This 10-bit pattern (‘0011111010’ or ‘1100000101’, ordered from bit 0
through 9) is used for alignment and link-to-link synchronization when operating in any of
the byte or word synchronization modes. The pattern of idles and data required to achieve
byte or word synchronization depends on the conguration of the receiver, see
Section 3.3.1, “Byte Alignment.” The appropriate sequence must be applied through the
10-bit interface. The automated facilities to generate idles and word-synchronization events
are disabled in TBI mode.
The WSE_GEN input does not cause the generation of word synchronization events in TBI
mode. However, WSE_GEN does work in conjunction with XMIT_x_K to invalidate
receiver byte alignment and word synchronization as described in the previous section.
Low
High
Transmit control present on XMIT_x_7–0 inputs.
High
don’t care
High
Transmit disparity-style word synchronization event,
ignore XMIT_x_7–0 inputs.
Table 2-2. Transmitter Control States
WSE_GEN
XMIT_x_IDLE
XMIT_x_K
Description
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相關代理商/技術參數
參數描述
MC92600VMB 制造商:Freescale Semiconductor 功能描述:
MC92603VF 功能描述:IC TXRX ETH QUAD GIG 256-MAPBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發(fā)器 驅動器/接收器數:2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應商設備封裝:16-PDIP 包裝:管件
MC92603VM 功能描述:IC ETH TXRX QUAD GIG 256-MAPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅動器/接收器數:2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
MC92604VM 功能描述:IC ETH TXRX DUAL GIG 196-MAPBGA RoHS:是 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 標準包裝:1,000 系列:- 類型:收發(fā)器 驅動器/接收器數:2/2 規(guī)程:RS232 電源電壓:3 V ~ 5.5 V 安裝類型:表面貼裝 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:16-SOIC 包裝:帶卷 (TR)
MC92604ZT 功能描述:IC TXRX ETH DUAL GIG 196-MAPBGA RoHS:否 類別:集成電路 (IC) >> 接口 - 驅動器，接收器，收發(fā)器 系列:- 產品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:25 系列:- 類型:收發(fā)器 驅動器/接收器數:2/2 規(guī)程:RS232 電源電壓:4.5 V ~ 5.5 V 安裝類型:通孔 封裝/外殼:16-DIP（0.300"，7.62mm） 供應商設備封裝:16-PDIP 包裝:管件
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