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參數(shù)資料
| 型號： | MC9S08JS8LCFK |
| 廠商： | Freescale Semiconductor |
| 文件頁數(shù)： | 11/32頁 |
| 文件大小： | 0K |
| 描述： | MCU 8BIT 8K FLASH 24-QFN |
| 標(biāo)準(zhǔn)包裝： | 490 |
| 系列： | S08 |
| 核心處理器： | S08 |
| 芯體尺寸： | 8-位 |
| 速度： | 48MHz |
| 連通性： | LIN，SCI，SPI，USB |
| 外圍設(shè)備： | LVD，POR，PWM |
| 輸入/輸出數(shù)： | 14 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 512 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 24-VQFN 裸露焊盤 |
| 包裝： | 托盤 |
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Electrical Characteristics
MC9S08JS16 Series MCU Data Sheet, Rev. 4
Freescale Semiconductor
19
3.9
AC Characteristics
This section describes AC timing characteristics for each peripheral system.
3.9.1
Control Timing
3 Jitter is the average deviation from the programmed frequency measured over the specified interval at maximum f
BUS.
Measurements are made with the device powered by filtered supplies and clocked by a stable external clock signal. Noise
injected into the FLL circuitry via VDD and VSS and variation in crystal oscillator frequency increase the CJitter percentage for
a given interval.
4 Jitter measurements are based upon a 48 MHz clock frequency.
5 625 ns represents 5 time quanta for CAN applications, under worst case conditions of 8 MHz CAN bus clock, 1 Mbps CAN
bus speed, and 8 time quanta per bit for bit time settings. 5 time quanta is the minimum time between a synchronization edge
and the sample point of a bit using 8 time quanta per bit.
6 Below D
lock minimum, the MCG is guaranteed to enter lock. Above Dlock maximum, the MCG will not enter lock. But if the MCG
is already in lock, then the MCG may stay in lock.
7 Below D
unl minimum, the MCG will not exit lock if already in lock. Above Dunl maximum, the MCG is guaranteed to exit lock.
Figure 13. Control Timing
Num
C
Parameter
Symbol
Min
Typical1
1 Typical values are based on characterization data at V
DD = 5.0 V, 25 °C unless otherwise stated.
Max
Unit
1
D
Bus frequency (tcyc = 1/fBus)fBus
DC
—
24
MHz
2
D
Internal low-power oscillator period
tLPO
700
—
1300
μs
3D
External reset pulse width2
(tcyc = 1/fSelf_reset)
2 This is the shortest pulse that is guaranteed to be recognized as a reset pin request. Shorter pulses are not guaranteed to
override reset requests from internal sources.
textrst
1.5
× t
Self_reset
——
ns
4
D
Reset low drive
trstdrv
66
× t
cyc
——
ns
5D
Active background debug mode latch setup
time
tMSSU
25
—
ns
6D
Active background debug mode latch hold
time
tMSH
25
—
ns
7D
IRQ pulse width
Asynchronous path2
Synchronous path3
3 This is the minimum pulse width guaranteed to pass through the pin synchronization circuitry. Shorter pulses may or may not
be recognized. In stop mode, the synchronizer is bypassed so shorter pulses can be recognized in that case.
tILIH, tIHIL
100
1.5
× t
cyc
——
ns
8D
KBIPx pulse width
Asynchronous path2
Synchronous path3
tILIH, tIHIL
100
1.5
× t
cyc
——
ns
9C
Port rise and fall time (load = 50 pF)4
Slew rate control disabled (PTxSE = 0)
Slew rate control enabled (PTxSE = 1)
4 Timing is shown with respect to 20% V
DD and 80% VDD levels. Temperature range –40°C to 85°C.
tRise, tFall
—
3
30
—
ns
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| MC9S08JS8LCWJ | 功能描述:8位微控制器 -MCU 8 BIT,8K FLASH 2.0 USB RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
| MC9S08LC36 | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:8-Bit HCS08 Central Processor Unit (CPU) |
| MC9S08LC36CLH | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC9S08LC36CLK | 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microcontrollers |
| MC9S08LC36LH | 功能描述:8位微控制器 -MCU 8 BIT 36K FLASH- LOW VOL RoHS:否 制造商:Silicon Labs 核心:8051 處理器系列:C8051F39x 數(shù)據(jù)總線寬度:8 bit 最大時鐘頻率:50 MHz 程序存儲器大小:16 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:1.8 V to 3.6 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:QFN-20 安裝風(fēng)格:SMD/SMT |
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