C
參數(shù)資料
型號(hào): MC9S08MP16VLC
廠商: Freescale Semiconductor
文件頁(yè)數(shù): 5/36頁(yè)
文件大小: 0K
描述: MCU 8BIT .25U SGF FLASH 32-LQFP
標(biāo)準(zhǔn)包裝: 250
系列: S08
核心處理器: S08
芯體尺寸: 8-位
速度: 51.34MHz
連通性: I²C,LIN,SCI,SPI
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 25
程序存儲(chǔ)器容量: 16KB(16K x 8)
程序存儲(chǔ)器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x12b,D/A 3x5b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 105°C
封裝/外殼: 32-LQFP
包裝: 托盤
Electrical Characteristics
MC9S08MP16 Series Data Sheet, Rev. 2
Freescale Semiconductor
13
C Input Capacitance, all pins
CIn
——
8
pF
14
C RAM retention voltage
VRAM
—0.6
1.0
V
15
C POR re-arm voltage9
VPOR
0.9
1.4
2.0
V
16
D POR re-arm time
tPOR
10
s
17
P Low-voltage detection threshold —
high range
VDD falling
VDD rising
VLVD1
3.9
4.0
4.1
4.2
V
18
Low-voltage detection threshold —
low range
VDD falling
VDD rising
VLVD0
2.48
2.54
2.56
2.62
2.64
2.70
V
P
19
Low-voltage warning threshold —
high range 1
VDD falling
VDD rising
VLVW3
4.5
4.6
4.7
4.8
V
P
20
Low-voltage warning threshold —
high range 0
VDD falling
VDD rising
VLVW2
4.2
4.3
4.4
4.5
V
P
21
Low-voltage warning threshold
low range 1
VDD falling
VDD rising
VLVW1
2.84
2.90
2.92
2.98
3.00
3.06
V
P
22
Low-voltage warning threshold —
low range 0
VDD falling
VDD rising
VLVW0
2.66
2.72
2.74
2.80
2.82
2.88
V
P
23
T Low-voltage inhibit reset/recover hysteresis
Vhys
5 V
100
mV
3 V
60
24
P Bandgap voltage reference at 25
C10
VBG
1.18
1.202
1.21
V
25
P
Bandgap voltage reference across temperature
range10
1.17
1.22
V
1 Typical values are measured at 25
C. Characterized, not tested
2 DC potential difference.
3 When keyboard interrupt is configured to detect rising edges, pulldown resistors are used in place of pullup resistors.
4 The specified resistor value is the actual value internal to the device. The pullup value may measure higher when measured externally
on the pin.
5 Power supply must maintain regulation within operating V
DD range during instantaneous and operating maximum current conditions. If
positive injection current (VIn > VDD) is greater than IDD, the injection current may flow out of VDD and could result in external power supply
going out of regulation. Ensure external VDD load will shunt current greater than maximum injection current. This will be the greatest risk
when the MCU is not consuming power. Examples are: if no system clock is present, or if clock rate is very low (which would reduce
overall power consumption).
6 Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance
values for positive and negative clamp voltages, then use the larger of the two values.
Table 7. DC Characteristics (continued)
Num C
Characteristic
Symbol
Condition
Min
Typ1
Max
Unit
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