Electrical Characteristics
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
208
Freescale Semiconductor
Maximum low-voltage safe state re-arm(3)
VREARM
—
3.0
V
Input high voltage (VDD > 2.3 V) (all digital inputs)
VIH
0.70
× VDD
—V
Input high voltage (1.8 V
≤ VDD ≤ 2.3 V) (all digital inputs)
VIH
0.85
× VDD
—V
Input low voltage (VDD > 2.3 V) (all digital inputs)
VIL
—
0.35
×
VDD
V
Input low voltage (1.8 V
≤ VDD ≤ 2.3 V)
(all digital inputs)
VIL
—
0.30
×
VDD
V
Input hysteresis (all digital inputs)
Vhys
0.06
× VDD
—V
Input leakage current (Per pin)
VIn = VDD or VSS, all input only pins
|IIn|
—
0.025
1.0
A
High impedance (off-state) leakage current (per pin)
VIn = VDD or VSS, all input/output
|IOZ|
—
0.025
1.0
A
Internal pullup resistors(4) (5)
RPU
17.5
52.5
κW
Internal pulldown resistor (IRQ)
RPD
17.5
52.5
κW
Output high voltage (VDD ≥ 1.8 V)
IOH = –2 mA (ports A, C, D and E)
VOH
VDD – 0.5
—
V
Output high voltage (port B and IRO)
IOH = –10 mA (VDD ≥ 2.7 V)
IOH = –6 mA (VDD ≥ 2.3 V)
IOH = –3 mA (VDD ≥ 1.8 V)
VDD – 0.5
—
Maximum total IOH for all port pins
|IOHT|
—
60
mA
Output low voltage (VDD ≥ 1.8 V)
IOL = 2.0 mA (ports A, C, D and E)
VOL
—
0.5
V
Output low voltage (port B)
IOL = 10.0 mA (VDD ≥ 2.7 V)
IOL = 6 mA (VDD ≥ 2.3 V)
IOL = 3 mA (VDD ≥ 1.8 V)
—
0.5
Output low voltage (IRO)
IOL = 16 mA (VDD ≥ 2.7 V)
IOL = 6 mA (VDD ≥ 2.3 V)
IOL = 3 mA (VDD ≥ 1.8 V)
—
1.2
Maximum total IOL for all port pins
IOLT
—60
mA
dc injection current(2), (6), (7), (8),, (9)
VIN < VSS, VIN > VDD
Single pin limit
Total MCU limit, includes sum of all stressed pins
|IIC|
—
0.2
5
mA
Input capacitance (all non-supply pins)
CIn
—7
pF
1. RAM will retain data down to POR voltage. RAM data not guaranteed to be valid following a POR.
2. This parameter is characterized and not tested on each device.
3. If SAFE bit is set, VDD must be above re-arm voltage to allow MCU to accept interrupts, refer to Section 5.6, “Low-Voltage 4. Measurement condition for pull resistors: VIn = VSS for pullup and VIn = VDD for pulldown.
5. The PTA0 pullup resistor may not pull up to the specied minimum VIH. However, all ports are functionally tested to guarantee
that a logic 1 will be read on any port input when the pullup is enabled and no dc load is present on the pin.
6. All functional non-supply pins are internally clamped to VSS and VDD.
Table A-5. DC Characteristics (Temperature Range = –40 to 85
°C Ambient) (continued)
Parameter
Symbol
Min
Typical
Max
Unit