Chapter 9 Analog-to-Digital Converter (S08ADC10V1)
MC9S08SG32 Data Sheet, Rev. 8
136
Freescale Semiconductor
9.3.9
Pin Control 2 Register (APCTL2)
The pin control registers disable the digital interface to the associated MCU pins used as analog inputs to
reduce digital noise and improve conversion accuracy. APCTL2 controls channels 8–15 of the ADC
module. This register is not implemented on MCUs that do not have associated external analog inputs.
Consult the ADC channel assignment in the module introduction for information on availability of this
register.
1
ADPC1
ADC Pin Control 1 — ADPC1 controls the pin associated with channel AD1.
0 AD1 pin I/O control enabled
1 AD1 pin I/O control disabled
0
ADPC0
ADC Pin Control 0 — ADPC0 controls the pin associated with channel AD0.
0 AD0 pin I/O control enabled
1 AD0 pin I/O control disabled
7654
3
210
R
ADPC15
ADPC14
ADPC13
ADPC12
ADPC11
ADPC10
ADPC9
ADPC8
W
Reset:
0
Figure 9-11. Pin Control 2 Register (APCTL2)
Table 9-11. APCTL2 Register Field Descriptions
Field
Description
7
ADPC15
ADC Pin Control 15 — ADPC15 controls the pin associated with channel AD15.
0 AD15 pin I/O control enabled
1 AD15 pin I/O control disabled
6
ADPC14
ADC Pin Control 14 — ADPC14 controls the pin associated with channel AD14.
0 AD14 pin I/O control enabled
1 AD14 pin I/O control disabled
5
ADPC13
ADC Pin Control 13 — ADPC13 controls the pin associated with channel AD13.
0 AD13 pin I/O control enabled
1 AD13 pin I/O control disabled
4
ADPC12
ADC Pin Control 12 — ADPC12 controls the pin associated with channel AD12.
0 AD12 pin I/O control enabled
1 AD12 pin I/O control disabled
3
ADPC11
ADC Pin Control 11 — ADPC11 controls the pin associated with channel AD11.
0 AD11 pin I/O control enabled
1 AD11 pin I/O control disabled
2
ADPC10
ADC Pin Control 10 — ADPC10 controls the pin associated with channel AD10.
0 AD10 pin I/O control enabled
1 AD10 pin I/O control disabled
Table 9-10. APCTL1 Register Field Descriptions (continued)
Field
Description