
Device User Guide — 9S12C32DGV1/D V01.14
This is very important to notice with respect to timers, serial modules where a pre-scaler will eliminate the
effect of the jitter to a large extent.
Table B-12 PLL Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1
P Self Clock Mode frequency
fSCM
1
5.5
MHz
2
D VCO locking range
fVCO
8
50
MHz
3D
Lock Detector transition from Acquisition to Tracking
mode
|
trk|
34
%1
NOTES:
1. % deviation from target frequency
4
D Lock Detection
|
Lock|
0
1.5
5
D Un-Lock Detection
|
unl|
0.5
2.5
6D
Lock Detector transition from Tracking to Acquisition
mode
|
unt|
68
7C PLLON Total Stabilization delay (Auto Mode) 2
2. fOSC = 4MHz, fBUS = 25MHz equivalent fVCO = 50MHz: REFDV = #$03, SYNR = #$018, Cs = 4.7nF, Cp = 470pF, Rs =
10K
.
tstab
0.5
ms
8D PLLON Acquisition mode stabilization delay
(2)tacq
0.3
ms
9D PLLON Tracking mode stabilization delay
(2)tal
0.2
ms
10
D Fitting parameter VCO loop gain
K1
-100
MHz/V
11
D Fitting parameter VCO loop frequency
f1
60
MHz
12
D Charge pump current acquisition mode
| ich |
38.5
A
13
D Charge pump current tracking mode
| ich |
3.5
A
14
C Jitter t parameter
1(2)j1
1.1
%
15
C Jitter t parameter
2(2)j2
0.13
%
F
re
e
sc
a
le
S
e
m
ic
o
n
d
u
c
to
r,
I
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
c
..
.