參數(shù)資料
型號: MC9S12C64CPB25
廠商: MOTOROLA INC
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP52
封裝: LQFP-52
文件頁數(shù): 14/136頁
文件大?。?/td> 2022K
代理商: MC9S12C64CPB25
Device User Guide — 9S12C128DGV1/D V01.05
110
B.6.1.4 External Reset
When external reset is asserted for a time greater than PWRSTL the CRG module generates an internal
reset, and the CPU starts fetching the reset vector without doing a clock quality check, if there was an
oscillation before reset.
B.6.1.5 Stop Recovery
Out of STOP the controller can be woken up by an external interrupt. A clock quality check as after POR
is performed before releasing the clocks to the system.
B.6.1.6 Pseudo Stop and Wait Recovery
The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in
both modes. The controller can be woken up by internal or external interrupts. After twrs the CPU starts
fetching the interrupt vector.
B.6.2 Oscillator
The device features an internal Colpitts oscillator. By asserting the XCLKS input during reset this
oscillator can be bypassed allowing the input of a square wave. Before asserting the oscillator to the
internal system clocks the quality of the oscillation is checked for each start from either power-on, STOP
or oscillator fail. tCQOUT specifies the maximum time before switching to the internal self clock mode in
case no proper oscillation is detected. The quality monitor also determines the minimum oscillator start-up
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