參數(shù)資料
型號: MCD221FU
廠商: MOTOROLA INC
元件分類: 消費家電
英文描述: CD-Interface and Audio Processor(CIAP)
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP80
封裝: QFP-80
文件頁數(shù): 3/10頁
文件大小: 187K
代理商: MCD221FU
MCD221
2–3
MOTOROLA
PIN DESCRIPTIONS
SIGNAL DESCRIPTIONS
Host Interface
Mnemonic
Type
Name and Function
A[13
1]
O
System Address Bus. The address must be stable before CS is asserted.
Active HIGH.
D[15
0]
B
System Data Bus. The data lines must be stable when CS is active during
a write and before DTACK is asserted during a read. Tri–state.
CS
I
Chip Select. Used to access the CIAP internal registers and buffers.
Active LOW.
R/W
I
Read/Write. Indicates the direction of the data transfer. When LOW, the
transfer is to the CIAP.
DTACK
B
Data Transfer Acknowledge. Active LOW. During normal host access,
DTACK is an output indicating that data has been put on (read cycles) or
read from (write cycles) the data bus. (Active pullup.) During DMA,
DTACK is an input indicating that the memory has put data on the data
bus.
INT
O
Interrupt. Released when the interrupt status register is read. Active
LOW.
IACK
I
Interrupt Acknowledge. Active LOW.
REQ
O
DMA Request. Active LOW.
ACK
I
Acknowledge. DMA handshake signal indicating that the bus is available
for data transfer. Active LOW.
RDY
O
Ready. DMA handshake signal indicating that the CIAP has completed
the data transfer. Tri–state. Active LOW. When released by the CIAP, the
output is forced high for a few nanoseconds before it is made tri–state.
DONE
I
Done. Indicates the last transfer of a DMA burst. Active LOW.
Serial Interface
Mnemonic
Type
Name and Function
Data Input
MOSI
I
Serial Data. Master out, slave in.
MISO
O
Serial Data. Master in, slave out.
MODE_0,
I
Serial Interface MODE bits.
Mnemonic
EFI
SUBCODE/EBU
Type
I
I
Name and Function
External Audio Interface
Error Flag Input.
Subcode (P
W) serial data input or EBU input for both main channel
Mnemonic
Type
Name and Function
I
External Audio Data Input. When not used, the pin must be connected to
XDAI
I
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