The average chip-junction temperature (T
參數(shù)資料
型號(hào)： MCF51QE96CLK
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 3/38頁(yè)
文件大小： 0K
描述： IC MCU 32BIT 96K FLASH 80-LQFP
產(chǎn)品培訓(xùn)模塊： Flexis QE Series Low Power Features
標(biāo)準(zhǔn)包裝： 90
系列： MCF51QE
核心處理器： Coldfire V1
芯體尺寸： 32-位
速度： 50MHz
連通性： I²C，SCI，SPI
外圍設(shè)備： LVD，PWM，WDT
輸入/輸出數(shù)： 70
程序存儲(chǔ)器容量： 96KB（96K x 8）
程序存儲(chǔ)器類型： 閃存
RAM 容量： 8K x 8
電壓 - 電源 (Vcc/Vdd)： 1.8 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 24x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 80-LQFP
包裝： 托盤
Electrical Characteristics
MCF51QE128 Series Data Sheet, Rev. 7
Freescale Semiconductor
11
The average chip-junction temperature (TJ) in °C can be obtained from:
TJ = TA + (PD × θJA)
Eqn. 1
where:
TA = Ambient temperature, °C
θ
JA = Package thermal resistance, junction-to-ambient, °C/W
PD = Pint + PI/O
Pint = IDD × VDD, Watts — chip internal power
PI/O = Power dissipation on input and output pins — user determined
For most applications, PI/O << Pint and can be neglected. An approximate relationship between PD and TJ (if PI/O is neglected)
is:
PD = K ÷ (TJ + 273°C)
Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD × (TA + 273°C) + θJA × (PD)
2
Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring PD (at equilibrium)
for a known TA. Using this value of K, the values of PD and TJ can be obtained by solving Equation 1 and Equation 2 iteratively
for any value of TA.
3.5
ESD Protection and Latch-Up Immunity
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early CMOS circuits,
normal handling precautions should be used to avoid exposure to static discharge. Qualification tests are performed to ensure
that these devices can withstand exposure to reasonable levels of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade Integrated Circuits. During
the device qualification ESD stresses were performed for the human body model (HBM), the machine model (MM) and the
charge device model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device specification. Complete
DC parametric and functional testing is performed per the applicable device specification at room temperature followed by hot
temperature, unless specified otherwise in the device specification.
Table 6. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human
Body
Series resistance
R1
1500
Ω
Storage capacitance
C
100
pF
Number of pulses per pin
—
3
Machine
Series resistance
R1
0
Ω
Storage capacitance
C
200
pF
Number of pulses per pin
—
3
Latch-up
Minimum input voltage limit
– 2.5
V
Maximum input voltage limit
7.5
V
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCF51QH128 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information Temperature range (ambient): -40°C to 105°C
MCF51QH128VHS 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information Temperature range (ambient): -40°C to 105°C
MCF51QH128VHX 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information Temperature range (ambient): -40°C to 105°C
MCF51QH32VFM 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information Temperature range (ambient): -40°C to 105°C
MCF51QH32VHS 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Advance Information Temperature range (ambient): -40°C to 105°C
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