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MOTOROLA
MCF5206 USERS MANUAL Rev 1.0
xxi
LIST OF TABLES
Table
Page
Number
Title
Number
1-1.
ColdFire MCF5206 Data Formats ...................................................................1-8
1-2.
ColdFire Effective Addressing Modes ............................................................. 1-9
1-3.
Specific Effective Addressing Modes .............................................................. 1-9
1-4.
MOVE Specific Effective Addressing Modes .................................................. 1-9
1-5.
Notational Conventions ................................................................................. 1-10
1-6.
Supervisor-Mode Instruction Summary......................................................... 1-12
1-7.
User-Mode Instruction Summary .................................................................. 1-12
2-1.
MCF5206 Signal Index.................................................................................... 2-2
2-2.
Address Bus ....................................................................................................2-3
2-3.
Byte Write-Enable Signals .............................................................................. 2-6
2-4.
Boot CS[0] Automatic Acknowledge (AA) Enable ........................................... 2-8
2-5.
Interrupt Request Encodings for CS[0] ...........................................................2-8
2-6.
Data Transfer Size Encoding .......................................................................... 2-9
2-7.
Bus Cycle Transfer Type Encoding .................................................................2-9
2-8.
ATM Encoding................................................................................................. 2-9
2-9.
CAS Assertion............................................................................................... 2-13
2-10.
Processor Status Encodings ......................................................................... 2-17
2-11.
MCF5206 Signal Summary ........................................................................... 2-20
3-1.
Exception Vector Assignments ....................................................................... 3-7
3-2.
Format Field Encodings .................................................................................. 3-8
3-3.
Fault Status Encodings ...................................................................................3-8
3-4.
Misaligned Operand References................................................................... 3-12
3-5.
Move Byte and Word Execution Times ..........................................................3-13
3-6.
Move Long Execution Times......................................................................... 3-13
3-7.
One Operand Instruction Execution Times ................................................... 3-14
3-8.
Two Operand Instruction Execution Times ................................................... 3-15
3-9.
Miscellaneous Instruction Execution Times .................................................. 3-16
3-10.
General Branch Instruction Execution Times................................................ 3-17
3-11.
BRA, Bcc Instruction Execution Times.......................................................... 3-17
4-1.
Initial Fetch Offset vs. CLNF Bits .................................................................... 4-4
4-2.
Instruction Cache Operation as Defined by CACR[31,10] .............................. 4-5
4-3.
Memory Map of I-Cache Registers .................................................................4-6
4-4.
External Fetch Size Based on Miss Address and CLNF................................. 4-8
Date: 8-31-98
Revision No.: 1.1
Pages affected: See change bars
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Freescale Semiconductor, Inc.
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