參數(shù)資料
型號(hào)： MCF5251CDVM140
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 140 MHz, MICROPROCESSOR, PBGA225
封裝： LEAD FREE, MAPBGA-225
文件頁數(shù)： 8/32頁
文件大?。?/td> 652K
代理商： MCF5251CDVM140
Electrical Specifications
MCF5251 ColdFire Processor Data Sheet: Technical Data, Rev. 2.1
16
Freescale Semiconductor
4.3
Serial Audio Interface Timing
The Serial Audio Interface fully complies with the Industry standard Philips IIS (InterIC Serial Audio Bus)
timings.
4.4
DDATA/PST/PSTCLK Debug Interface
Table 13 provides the timing parameters.
4.5
BDM and JTAG Timing
Table 14 provides the BDM timing parameters.
Figure 4 provides the JTAG timing diagram and Table 15 provides the JTAG timing parameters.
Table 12. SPDIF Propagation Skew and Transition Parameters
Characteristic
Pin Load
Prop Delay
Maximum
Skew1
Maximum
1 Skew value does not include the skew introduced by different rise and fall times.
Transition2 Rise
Maximum
2 Transition times between 10% Vdd and 90% Vdd.
Transition Fall
Maximum
Units
EBUIN1, EBUIN2, EBUIN3, EBUIN4:
asynchronous inputs, no specs apply
––
0.7
–
ns
EBUOUT1, EBUOUT2 output
40 pF
–
1.5
24.2
31.3
ns
EBUOUT1, EBUOUT2 output
20 pF
–
1.5
13.6
18.0
ns
Table 13. DDATA/PST/PSTCLK Debug Interface Timing Parameters
Characteristic
Pin Load
Min
Max
Units
PSTCLK clock rise edge to DDATA/PSTDATA1 invalid
1 Note that output data may go invalid before rising edge of the clock. To clock data in reliably, you need to sample data, for
example, 2 ns before rising edge of clock.
15 pF
–1.0
—
ns
PSTCLK clock rise edge to DDATA/PSTDATA2 valid
2 Timing figure given takes 50% margin for noise and uncertainty on pin capacitance. Simulated clock-to-data, not taking noise
effects into account is 2.7 ns.
15 pF
—
4.0
ns
Table 14. BDM Interface Timing Parameters
Characteristic
Min
Max
Units
Clock period for DSCLK clock
—
5T1
1 T denotes the CPU clock period. E.g. if the CPU is running at 100 MHz, T = 10 ns
ns
Set-up time DSI, BKPT, to DSCLK rising edge
4.0
—
ns
Hold time DSI, BKPT to DSCLK rising edge
—
T+ 4.0
ns
Propagation delay DSCLK rising edge to TDO/DSO change
3T
4T + 32
ns
相關(guān)PDF資料
PDF描述
MCF5251CEVM140 32-BIT, 140 MHz, MICROPROCESSOR, PBGA225
MCF5251EVM140 32-BIT, 140 MHz, MICROPROCESSOR, PBGA225
MCF54417CMJ250 MICROPROCESSOR, PBGA256
MCF54418CMJ250 MICROPROCESSOR, PBGA256
MCF54415CMJ250 MICROPROCESSOR, PBGA256
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCF5251CEVM140 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ColdFire Processor
MCF5251CVM140 功能描述:微處理器 - MPU AMADEUS+USB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
MCF5251DVM140 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ColdFire Processor
MCF5251EVM140 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ColdFire Processor
MCF5251VM140 功能描述:微處理器 - MPU AMADEUS+USB RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數(shù)據(jù)總線寬度:32 bit 最大時(shí)鐘頻率:536 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:FBGA-324
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*