參數(shù)資料
型號(hào)： MCF5275LCVM166
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 11/44頁(yè)
文件大?。?/td> 0K
描述： IC MCU 32BIT 166MHZ 196-MAPBGA
標(biāo)準(zhǔn)包裝： 126
系列： MCF527x
核心處理器： Coldfire V2
芯體尺寸： 32-位
速度： 166MHz
連通性： EBI/EMI，以太網(wǎng)，I²C，SPI，UART/USART，USB
外圍設(shè)備： DMA，WDT
輸入/輸出數(shù)： 61
程序存儲(chǔ)器類(lèi)型： ROMless
RAM 容量： 64K x 8
電壓 - 電源 (Vcc/Vdd)： 1.4 V ~ 1.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 196-LBGA
包裝： 托盤(pán)
Electrical Characteristics
MCF5275 Integrated Microprocessor Family Hardware Specification, Rev. 4
Freescale Semiconductor
19
8.2
Thermal Characteristics
Table 8 lists thermal resistance values
2
This device contains circuitry protecting against damage due to high static voltage or electrical fields;
however, it is advised that normal precautions be taken to avoid application of any voltages higher than
maximum-rated voltages to this high-impedance circuit. Reliability of operation is enhanced if unused
inputs are tied to an appropriate logic voltage level (e.g., VSS or O VDD).
3
Input must be current limited to the value specified. To determine the value of the required
current-limiting resistor, calculate resistance values for positive and negative clamp voltages, then use
the larger of the two values.
4
All functional non-supply pins are internally clamped to VSS and O VDD.
5
Power supply must maintain regulation within operating O VDD range during instantaneous and
operating maximum current conditions. If positive injection current (Vin > O VDD) is greater than IDD, the
injection current may flow out of O VDD and could result in external power supply going out of
regulation. Ensure the external O VDD load shunts current greater than maximum injection current. This
is the greatest risk when the MCU is not consuming power (ex; no clock).Power supply must maintain
regulation within operating VDD range during instantaneous and operating maximum current conditions.
Table 8. Thermal characteristics
Characteristic
Symbol
256MBGA
196MBGA
Unit
Junction to ambient, natural convection
Four layer board (2s2p)
θ
JMA
261,2
1
θ
JMA and Ψjt parameters are simulated in conformance with EIA/JESD Standard 51-2 for natural convection. Freescale
recommends the use of
θ
JmA and power dissipation specifications in the system design to prevent device junction
temperatures from exceeding the rated specification. System designers should be aware that device junction temperatures
can be significantly influenced by board layout and surrounding devices. Conformance to the device junction temperature
specification can be verified by physical measurement in the customer’s system using the
Ψ
jt parameter, the device power
dissipation, and the method described in EIA/JESD Standard 51-2.
2
Per JEDEC JESD51-6 with the board horizontal.
°C/W
Junction to ambient (@200 ft/min)
Four layer board (2s2p)
θ
JMA
231,2
°C/W
Junction to board
θ
JB
153
3
Thermal resistance between the die and the printed circuit board in conformance with JEDEC JESD51-8. Board
temperature is measured on the top surface of the board near the package.
203
°C/W
Junction to case
θ
JC
104
4
Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883
Method 1012.1).
104
°C/W
Junction to top of package
Natural convection
Ψ
jt
5
Thermal characterization parameter indicating the temperature difference between package top and the junction
temperature per JEDEC JESD51-2. When Greek letters are not available, the thermal characterization parameter is written
in conformance with Psi-JT.
°C/W
Maximum operating junction temperature
Tj
105
oC
The average chip-junction temperature (TJ) in °C can be obtained from:
(1)
Where:
TA
= Ambient Temperature,
°C
Θ
JMA
= Package Thermal Resistance, Junction-to-Ambient,
°C/W
PD
= PINT + PI/O
TJ
TA
PD ΘJMA
×
()
+
=
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