MCF537x ColdFire Microprocessor Data Sheet, Rev. 4 Electrical Characteristics Fr" />
參數(shù)資料
型號： MCF5372LCVM240
廠商： Freescale Semiconductor
文件頁數(shù)： 21/46頁
文件大?。?/td> 0K
描述： IC MPU RISC 240MHZ 196-MAPBGA
產(chǎn)品培訓(xùn)模塊： ColdFire® Embedded Voice Solution
標(biāo)準(zhǔn)包裝： 126
系列： MCF537x
核心處理器： Coldfire V3
芯體尺寸： 32-位
速度： 240MHz
連通性： EBI/EMI，以太網(wǎng)，I²C，SPI，SSI，UART/USART，USB，USB OTG
外圍設(shè)備： DMA，POR，PWM，WDT
輸入/輸出數(shù)： 62
程序存儲器類型： ROMless
RAM 容量： 32K x 8
電壓 - 電源 (Vcc/Vdd)： 1.4 V ~ 3.6 V
振蕩器型： 外部
工作溫度： -40°C ~ 85°C
封裝/外殼： 196-LBGA
包裝： 托盤
MCF537x ColdFire Microprocessor Data Sheet, Rev. 4
Electrical Characteristics
Freescale Semiconductor
28
5.10
USB On-The-Go
The MCF5373 device is compliant with industry standard USB 2.0 specification.
5.11
SSI Timing Specifications
This section provides the AC timings for the SSI in master (clocks driven) and slave modes (clocks input). All timings are given
for non-inverted serial clock polarity (SSI_TCR[TSCKP] = 0, SSI_RCR[RSCKP] = 0) and a non-inverted frame sync
(SSI_TCR[TFSI] = 0, SSI_RCR[RFSI] = 0). If the polarity of the clock and/or the frame sync have been inverted, all the timings
remain valid by inverting the clock signal (SSI_BCLK) and/or the frame sync (SSI_FS) shown in the figures below.
Table 14. SSI Timing – Master Modes1
1 All timings specified with a capactive load of 25pF.
Num
Description
Symbol
Min
Max
Units
S1
SSI_MCLK cycle time2
2 SSI_MCLK can be generated from SSI_CLKIN or a divided version of the internal system clock
(SYSCLK).
tMCLK
8
× t
SYS
—ns
S2
SSI_MCLK pulse width high / low
45%
55%
tMCLK
S3
SSI_BCLK cycle time3
3 SSI_BCLK can be derived from SSI_CLKIN or a divided version of SYSCLK. If the SYSCLK is used, the
minimum divider is 6. If the SSI_CLKIN input is used, the programmable dividers must be set to ensure
that SSI_BCLK does not exceed 4 x fSYS.
tBCLK
8
× t
SYS
—ns
S4
SSI_BCLK pulse width
45%
55%
tBCLK
S5
SSI_BCLK to SSI_FS output valid
—
15
ns
S6
SSI_BCLK to SSI_FS output invalid
-2
—
ns
S7
SSI_BCLK to SSI_TXD valid
—
15
ns
S8
SSI_BCLK to SSI_TXD invalid / high impedence
-4
—
ns
S9
SSI_RXD / SSI_FS input setup before SSI_BCLK
15
—
ns
S10
SSI_RXD / SSI_FS input hold after SSI_BCLK
0
—
ns
Table 15. SSI Timing – Slave Modes1
1 All timings specified with a capactive load of 25pF.
Num
Description
Symbol
Min
Max
Units
S11
SSI_BCLK cycle time
tBCLK
8
× t
SYS
—ns
S12
SSI_BCLK pulse width high/low
45%
55%
tBCLK
S13
SSI_FS input setup before SSI_BCLK
10
—
ns
S14
SSI_FS input hold after SSI_BCLK
3
—
ns
S15
SSI_BCLK to SSI_TXD/SSI_FS output valid
—
15
ns
S16
SSI_BCLK to SSI_TXD/SSI_FS output invalid/high
impedence
-2
—
ns
S17
SSI_RXD setup before SSI_BCLK
10
—
ns
S18
SSI_RXD hold after SSI_BCLK
3
—
ns
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MCF53721CVM240,
MCF5372LCVM240,
MCF5373LCVM240
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
MCF5372LCVM240J 功能描述:32位微控制器 - MCU V3CORE RoHS:否 制造商:Texas Instruments 核心:C28x 處理器系列:TMS320F28x 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:90 MHz 程序存儲器大小:64 KB 數(shù)據(jù) RAM 大小:26 KB 片上 ADC:Yes 工作電源電壓:2.97 V to 3.63 V 工作溫度范圍:- 40 C to + 105 C 封裝 / 箱體:LQFP-80 安裝風(fēng)格:SMD/SMT
MCF5373 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ColdFire㈢ Microprocessor
MCF5373_08 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ColdFire㈢ Microprocessor
MCF5373CAB180 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:Microprocessor Data Sheet
MCF5373L 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:ColdFire㈢ Microprocessor
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