Pin Assignments and Reset States
MCF537x ColdFire Microprocessor Data Sheet, Rev. 4
Freescale Semiconductor
9
USB Host & USB On-the-Go
USBOTG_M
—
I/O
USB
VDD
—
H14
USBOTG_P
—
I/O
USB
VDD
—
H13
USBHOST_M
—
I/O
USB
VDD
—
J13
USBHOST_P
—
I/O
USB
VDD
—
J12
FlexCAN (MCF53721 only)
CANRX and CANTX do not have dedicated bond pads. Please refer to the following pins for muxing:
I2C_SDA for CANRX and I2C_SCL for CANTX.
PWM
PWM7
PPWM7
—
I/O
EVDD
—
E13
PWM5
PPWM5
—
I/O
EVDD
—
E12
PWM3
PPWM3
DT3OUT
DT3IN
I/O
EVDD
—
E11
PWM1
PPWM1
DT2OUT
DT2IN
I/O
EVDD
—
F14
SSI
The SSI signals do not have dedicated bond pads. Please refer to the following pins for muxing: IRQ4 for SSI_MCLK,
IRQ1 for SSI_CLKIN, U1CTS for SSI_BCLK, U1RTS for SSI_FS, U1RXD for SSI_RXD, and U1TXD for SSI_TXD
I2C
I2C_SCL2
PFECI2C1
CANTX6
U2TXD
I/O
EVDD
—
E3
I2C_SDA2
PFECI2C0
CANRX6
U2RXD
I/O
EVDD
—
E4
DMA
DACK[1:0] and DREQ[1:0] do not have dedicated bond pads. Please refer to the following pins for muxing:
TS for DACK0, DT0IN for DREQ0, DT1IN for DACK1, and IRQ1 for DREQ1.
QSPI
QSPI_CS2
PQSPI5
U2RTS
—
O
EVDD
78
N12
QSPI_CS1
PQSPI4
PWM7
USBOTG_
PU_EN
O
EVDD
—
M12
QSPI_CS0
PQSPI3
PWM5
—
O
EVDD
—
M11
QSPI_CLK
PQSPI2
I2C_SCL2
—
O
EVDD
77
P12
QSPI_DIN
PQSPI1
U2CTS
—
I
EVDD
75
P11
QSPI_DOUT
PQSPI0
I2C_SDA2
—
O
EVDD
76
N11
Table 3. MCF5372/3 Signal Information and Muxing (continued)
Signal Name
GPIO
Alternate 1
Alternate 2
Di
r.
1
Vo
lt
a
g
e
Domain
MCF5372
MCF5373
160 QFP
MCF5372L
MCF53721
MCF5373L
196 MAPBGA
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
MCF53721CVM240,
MCF5372LCVM240,
MCF5373LCVM240