參數資料
型號: MCF54415CMJ250
廠商: FREESCALE SEMICONDUCTOR INC
元件分類: 微控制器/微處理器
英文描述: MICROPROCESSOR, PBGA256
封裝: 12 X 12 MM, ROHS COMPLAINT, MAPBGA-256
文件頁數: 40/60頁
文件大?。?/td> 1107K
代理商: MCF54415CMJ250
Electrical characteristics
MCF5441x ColdFire Microprocessor Data Sheet, Rev. 6
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
45
4.20
mcPWM timing specifications
4.21
I2C timing specifications
Table 29 lists specifications for the I2C input timing parameters shown in Figure 27.
Table 30 lists specifications for the I2C output timing parameters shown in Figure 27.
Integral non-linearity (497 to 3599)
INL
±8.0
lsb
Differential non-linearity (497 to 3599)
DNL
±0.5
lsb
Gain error (497 to 3599)
EGAIN
±0.26
%
Effective number of bits
ENOB
9
bits
DAC power-up time
tDAPU
11
us
Output load resistance
RL
3K
Ohm
Output load capacitance
CL
400
pF
Power supply ripple rejection
PSRR
60
dB
1
All measurements were made at VDD = 3.3V, VREFH = 3.3V, and VREFL = ground
Table 28. mcPWM timing
Num
Characteristic
Min
Max
Unit
G1
FB_CLK high to output valid
7
ns
G2
FB_CLK high to output invalid
1
ns
G3
Input valid to FB_CLK high
3
ns
G4
FB_CLK high to input invalid
1
ns
Table 29. I2C input timing specifications between SCL and SDA
Num
Characteristic
Min
Max
Units
I1
Start condition hold time
2
1/fSYS
I2
Clock low period
8
1/fSYS
I3
I2C_SCL/I2C_SDA rise time (VIL = 0.5 V to VIH =2.4 V)
1
ms
I4
Data hold time
0
ns
I5
I2C_SCL/I2C_SDA fall time (VIH = 2.4 V to VIL =0.5 V)
1
ms
I6
Clock high time
4
1/fSYS
I7
Data setup time
0
ns
I8
Start condition setup time (for repeated start condition only)
2
1/fSYS
I9
Stop condition setup time
2
1/fSYS
Table 27. DAC parameters1 (continued)
Characteristic
Name
Min
Typical
Max
Unit
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相關代理商/技術參數
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MCF54417CMJ250 制造商:Freescale Semiconductor 功能描述:IC 32-BIT MPU COLDFIRE 250MHZ 256-MA