MCF547x ColdFire Microprocessor, Rev. 4 Freescale Semiconductor 15 Fig" />
參數資料
型號: MCF5475ZP266
廠商: Freescale Semiconductor
文件頁數: 7/34頁
文件大?。?/td> 0K
描述: IC MPU 32BIT COLDF 388-PBGA
標準包裝: 40
系列: MCF547x
核心處理器: Coldfire V4E
芯體尺寸: 32-位
速度: 266MHz
連通性: EBI/EMI,以太網,I²C,SPI,UART/USART,USB
外圍設備: DMA,PWM,WDT
輸入/輸出數: 99
程序存儲器類型: ROMless
RAM 容量: 32K x 8
電壓 - 電源 (Vcc/Vdd): 1.43 V ~ 1.58 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 388-BBGA
包裝: 托盤
SDRAM Bus
MCF547x ColdFire Microprocessor, Rev. 4
Freescale Semiconductor
15
Figure 12. FlexBus Write Timing
9
SDRAM Bus
The SDRAM controller supports accesses to main SDRAM memory from any internal master. It supports standard SDRAM or
double data rate (DDR) SDRAM, but it does not support both at the same time. The SDRAM controller uses SSTL2 and SSTL3
I/O drivers. Both SSTL drive modes are programmable for Class I or Class II drive strength.
9.1
SDR SDRAM AC Timing Characteristics
The following timing numbers indicate when data is latched or driven onto the external bus, relative to the memory bus clock,
when operating in SDR mode on write cycles and relative to SDR_DQS on read cycles. The MCF54
7x SDRAM controller is
a DDR controller that has an SDR mode. Because it is designed to support DDR, a DQS pulse must be supplied to the MCF54
7x
for each data beat of an SDR read. The MCF54
7x accomplishes this by asserting a signal called SDR_DQS during read cycles.
Care must be taken during board design to adhere to the following guidelines and specs with regard to the SDR_DQS signal
and its usage.
CLKIN
AD[X:0]
AD[31:Y]
R/W
ALE
TSIZ[1:0]
FBCSn, BE/BWEn
TA
FB1
A[X:0]
A[31:Y]
DATA
FB2
FB3
TSIZ[1:0]
FB3
FB6
FB7
OE
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MCF5480CZP166 功能描述:微處理器 - MPU MCF548X V4ECORE MMU FPU RoHS:否 制造商:Atmel 處理器系列:SAMA5D31 核心:ARM Cortex A5 數據總線寬度:32 bit 最大時鐘頻率:536 MHz 程序存儲器大小:32 KB 數據 RAM 大小:128 KB 接口類型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作電源電壓:1.8 V to 3.3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:FBGA-324