Technical Data
MC68HC908MR8 — Rev 4.1
220
Timer Interface A (TIMA)
Freescale Semiconductor
Timer Interface A (TIMA)
NOTE:
Before changing a channel function by writing to the MSxB or MSxA bit,
set the TSTOP and TRST bits in the TIMA status and control register
(TASC).
ELSxB and ELSxA — Edge/Level Select Bits
When channel x is an input capture channel, these read/write bits
control the active edge-sensing logic on channel x.
When channel x is an output compare channel, ELSxB and ELSxA
control the channel x output behavior when an output compare
occurs.
When ELSxB and ELSxA are both clear, channel x is not connected
to port B, and pin PTBx/TCHxA is available as a general-purpose I/O
pin. However, channel x is at a state determined by these bits and
becomes transparent to the respective pin when PWM, input capture,
or output compare mode is enabled. Table 11-2 shows how ELSxA
and ELSxA work. Reset clears the ELSxB and ELSxA bits.
Table 11-2. Mode, Edge, and Level Selection
MSxB:MSxA
ELSxB:ELSxA
Mode
Configuration
X0
00
Output
preset
Pin under port control:
Initialize timer
Output level high
X1
00
Pin under port control:
Initialize timer
Output level low
00
01
Input
capture
Capture on rising edge only
00
10
Capture on falling edge only
00
11
Capture on rising or falling edge
01
Output
compare
or PWM
Toggle output on compare
01
10
Clear output on compare
01
11
Set output on compare
1X
01
Buffered
output
compare
or
buffered
PWM
Toggle output on compare
1X
10
Clear output on compare
1X
11
Set output on compare