參數(shù)資料
型號： MCIMX27VOP4A
廠商： FREESCALE SEMICONDUCTOR INC
元件分類： 微控制器/微處理器
英文描述： 32-BIT, 400 MHz, MICROPROCESSOR, PBGA404
封裝： 17 X 17 MM, 0.65 MM PITCH, ROHS COMPLIANT, PLASTIC, MAPBGA-404
文件頁數(shù)： 63/152頁
文件大?。?/td> 3889K
代理商： MCIMX27VOP4A
i.MX27 and i.MX27L Data Sheet, Rev. 1.6
18
Freescale Semiconductor
Functional Description and Application Information
Support for single (non-split) screen monochrome or color LCD panels and self-refresh type LCD
panels
16 simultaneous gray-scale levels from a palette of 16 for monochrome display
Support for:
— Maximum resolution of 800
× 600
— Passive color panel:
– 4 (mapped to RGB444)/8 (mapped to RGB444)/12 (RGB444) bits per pixel (bpp)
— TFT panel:
– 4 (mapped to RGB666)/8 (mapped to RGB666)/12 (RGB444)/16 (RGB565)/18 (RGB666)
bpp
— 16 and 256 colors out of a palette of 4096 colors for 4 bpp and 8 bpp CSTN display,
respectively
— 16 and 256 colors out of a palette of 256 colors for 4 bpp and 8 bpp TFT display, respectively
— True 4096 colors for a 12 bpp display
— True 64-Kbyte colors for 16 bpp
— True 256-Kbyte colors for 18 bpp
— 16-bit AUO TFT LCD Panel
— 24-bit AUO TFT LCD Panel
2.3.21
Multi-Master Memory Interface (M3IF)/M3IF-ESDCTL/MDDRC
Interface
The M3IF-ESDCTL/MDDRC interface is optimized and designed to reduce access latency by generating
multiple accesses through the dedicated ESDCTL/MDDRC arbitration (MAB) module, which controls the
access to and from the Enhanced SDRAM/MDDR memory controller. For the other port interfaces, the
M3IF only arbitrates and forwards the master requests received through the Master Port Gasket (MPG)
interface and M3IF Arbitration (M3A) module toward the respective memory controller. The masters that
interface with the M3IF include the ARM Platform, FEC, LCDC, H.264, and the USB. The controllers are
the ESDCTL/MDDRC, PCMCIA, NFC, and WEIM.
2.3.22
Multi-Layer AHB Crossbar Switch (MAX)
The ARM926EJ-S processor’s instruction and data buses—and all alternate bus master
interfaces—arbitrate for resources via a 6
× 34 Multi-Layer AHB Crossbar Switch (MAX). There are six
(M0–M5) fully functional master ports and three (S0–S2) fully functional slave ports. The MAX is
uni-directional. All master and slave ports are AHB-Lite compliant.
The design of the crossbar switch enables concurrent transactions to proceed from any master port to any
slave port. That is, it is possible for all three slave ports to be active at the same time as a result of three
independent master requests. If a particular slave port is simultaneously requested by more than one master
port, arbitration logic exists inside the crossbar to allow the higher priority master port to be granted the
bus, while stalling the other requestor(s) until that transaction has completed. The slave port arbitration
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相關代理商/技術參數(shù)
參數(shù)描述
MCIMX27VOP4AR2 功能描述:處理器 - 專門應用 I.MX27 REV 2.1 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX27VOP4R2 制造商:Freescale Semiconductor 功能描述:MULTIMEDIA PROCESSOR 404-PIN MA-BGA T/R - Tape and Reel
MCIMX27WPDK 功能描述:開發(fā)板和工具包 - ARM MCIMX27 PDK For WINCE RoHS:否 制造商:Arduino 產品:Development Boards 工具用于評估:ATSAM3X8EA-AU 核心:ARM Cortex M3 接口類型:DAC, ICSP, JTAG, UART, USB 工作電源電壓:3.3 V
MCIMX280CVM4B 功能描述:處理器 - 專門應用 Catskills Rev1.2 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
MCIMX280DVM4B 功能描述:處理器 - 專門應用 Catskills Rev1.2 RoHS:否 制造商:Freescale Semiconductor 類型:Multimedia Applications 核心:ARM Cortex A9 處理器系列:i.MX6 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:1 GHz 指令/數(shù)據(jù)緩存: 數(shù)據(jù) RAM 大小:128 KB 數(shù)據(jù) ROM 大小: 工作電源電壓: 最大工作溫度:+ 95 C 安裝風格:SMD/SMT 封裝 / 箱體:MAPBGA-432
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