參數(shù)資料
型號: MCIMX31LDVKN5D
廠商: Freescale Semiconductor
文件頁數(shù): 37/118頁
文件大小: 0K
描述: IC MPU I/MX31L CONSUMR 457MAPBGA
標準包裝: 152
系列: i.MX31
核心處理器: ARM11
芯體尺寸: 32-位
速度: 532MHz
連通性: 1 線,ATA,EBI/EMI,F(xiàn)IR,I²C,MMC/SD,PCMCIA,SIM,SPI,SSI,UART/USART,USB,USB OTG
外圍設備: DMA,LCD,POR,PWM,WDT
程序存儲器類型: ROMless
RAM 容量: 16K x 8
電壓 - 電源 (Vcc/Vdd): 1.22 V ~ 3.3 V
振蕩器型: 外部
工作溫度: 0°C ~ 70°C
封裝/外殼: 457-LFBGA
包裝: 托盤
Electrical Characteristics
MCIMX31/MCIMX31L Technical Data, Rev. 4.3
Freescale Semiconductor
25
Figure 8. Write 1 Sequence Timing Diagram
Figure 9. Read Sequence Timing Diagram
4.3.5
ATA Electrical Specifications (ATA Bus, Bus Buffers)
This section discusses ATA parameters. For a detailed description, refer to the ATA specification.
The user needs to use level shifters for 3.3 Volt or 5.0 Volt compatibility on the ATA interface.
The use of bus buffers introduces delay on the bus and introduces skew between signal lines. These factors
make it difficult to operate the bus at the highest speed (UDMA-5) when bus buffers are used. If fast
UDMA mode operation is needed, this may not be compatible with bus buffers.
Another area of attention is the slew rate limit imposed by the ATA specification on the ATA bus.
According to this limit, any signal driven on the bus should have a slew rate between 0.4 and 1.2 V/ns with
a 40 pF load. Not many vendors of bus buffers specify slew rate of the outgoing signals.
When bus buffers are used, the ata_data bus buffer is special. This is a bidirectional bus buffer, so a
direction control signal is needed. This direction control signal is ata_buffer_en. When its high, the bus
should drive from host to device. When its low, the bus should drive from device to host. Steering of the
signal is such that contention on the host and device tri-state busses is always avoided.
Table 22. WR1/RD Timing Parameters
ID
Parameter
Symbol
Min
Typ
Max
Units
OW7
Write 1 / Read Low Time
tLOW1
15
s
OW8
Transmission Time Slot
tSLOT
60
117
120
s
OW9
Release Time
tRELEASE
15
45
s
OW7
OW8
1-Wire bus
(BATT_LINE)
OW7
OW8
OW9
1-Wire bus
(BATT_LINE)
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