
Electrical Characteristics
MCIMX31/MCIMX31L Technical Data, Rev. 4.1
Freescale Semiconductor
81
Figure 64 depicts timing of the 5-wire serial interface (Type 2). For this interface, a separate RS line is
added. When a burst is transmitted within single active chip select interval, the RS can be changed at
boundaries of words.
Figure 64. 5-Wire Serial Interface (Type 2) Timing Diagram
Preamble
DISPB_D#_CS
DISPB_SD_D_CLK
DISPB_SD_D
RW
Output data
D7
D6
D5
D4
D3
D2
D1
D0
DISPB_SD_D
(Output)
(Input)
Preamble
DISPB_D#_CS
DISPB_SD_D_CLK
DISPB_SD_D
RW
Input data
DISPB_SD_D
D7
D6
D5
D4
D3
D2
D1
D0
(Output)
(Input)
Write
Read
DISPB_SER_RS
1 display IF
clock cycle
1 display IF
clock cycle
1 display IF
clock cycle
1 display IF
clock cycle
1 display IF
clock cycle
1 display IF
clock cycle
Because
of
an
order
from
the
United
States
International
Trade
Commission,
BGA-packaged
product
lines
and
part
numbers
indicated
here
currently
are
not
available
from
Freescale
for
import
or
sale
in
the
United
States
prior
to
September
2010:
i.MX31
Product
Family