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參數(shù)資料
| 型號： | MCM6206BBEJ25 |
| 廠商： | MOTOROLA INC |
| 元件分類： | SRAM |
| 英文描述： | 32K x 8 Bit Fast Static RAM |
| 中文描述： | 32K X 8 STANDARD SRAM, 25 ns, PDSO28 |
| 封裝： | 0.300 INCH, PLASTIC, SOJ-28 |
| 文件頁數(shù)： | 6/8頁 |
| 文件大?。?/td> | 108K |
| 代理商： | MCM6206BBEJ25 |
MCM6206BB
6
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled, See Note 1)
– 12
– 15
– 20
– 25
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
tAVEL
tAVEH
tELEH,
tELWH
12
—
15
—
20
—
25
—
ns
Address Setup Time
0
—
0
—
0
—
0
—
ns
Address Valid to End of Write
10
—
12
—
15
—
20
—
ns
Enable to End of Write
9
—
10
—
12
—
15
—
ns
3,4
Data Valid to End of Write
tDVEH
tEHDX
tEHAX
6
—
7
—
8
—
10
—
ns
Data Hold Time
0
—
0
—
0
—
0
—
ns
Write Recovery Time
0
—
0
—
0
—
0
—
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. All timings are referenced from the last valid address to the first transitioning address.
3. If E goes low coincident with or after W goes low, the output will remain in a high impedance state.
4. If E goes high coincident with or before W goes high, the output will remain in a high impedance state.
WRITE CYCLE 2
(E Controlled, See Note 1)
tWLEH
tEHDX
tDVEH
tEHAX
tELWH
tELEH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
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相關(guān)代理商/技術(shù)參數(shù) |
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| MCM6206BBEJ25R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32K x 8 Bit Fast Static RAM |
| MCM6206C | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32K x 8 Bit Fast Static RAM |
| MCM6206CJ15 | 制造商:Motorola Inc 功能描述: |
| MCM6206CJ-15 | 制造商:Motorola Inc 功能描述:Static RAM, 32Kx8, 28 Pin, Plastic, SOJ |
| MCM6206CJ15R2 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:32K x 8 Bit Fast Static RAM |
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