參數(shù)資料
型號(hào): MCM6206DP12
廠(chǎng)商: MOTOROLA INC
元件分類(lèi): SRAM
英文描述: 32K x 8 Bit Fast Static RAM
中文描述: 32K X 8 STANDARD SRAM, 12 ns, PDIP28
封裝: 0.300 INCH, PLASTIC, DIP-28
文件頁(yè)數(shù): 2/8頁(yè)
文件大?。?/td> 162K
代理商: MCM6206DP12
MCM6206D
2
MOTOROLA FAST SRAM
TRUTH TABLE
(X = Don’t Care)
E
G
W
Mode
VCC Current
ISB1, ISB2
ICCA
ICCA
ICCA
Output
Cycle
H
X
X
Not Selected
High–Z
L
H
H
Output Disabled
High–Z
L
L
H
Read
Dout
High–Z
Read Cycle
L
X
L
Write
Write Cycle
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
Vin, Vout
– 0.5 to + 7.0
V
Voltage Relative to VSS For Any Pin
Except VCC
– 0.5 to VCC + 0.5
V
Output Current
Iout
PD
Tbias
TA
Tstg
±
20
mA
Power Dissipation
1.0
W
Temperature Under Bias
– 10 to + 85
°
C
Operating Temperature
0 to + 70
°
C
Storage Temperature—Plastic
– 55 to + 125
°
C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for ex-
tended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
10%, TA = 0 to 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage (Operating Voltage Range)
VCC
VIH
4.5
5.0
5.5
V
Input High Voltage
2.2
VCC + 0.3
**
V
Input Low Voltage
VIL
– 0.5
*
0.8
V
*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width
20 ns)
**VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width
20 ns)
DC CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (E = VIH or G = VIH, Vout = 0 to VCC)
Output High Voltage (IOH = – 4.0 mA)
Output Low Voltage (IOL = 8.0 mA)
Ilkg(I)
Ilkg(O)
VOH
VOL
±
1
μ
A
±
1
μ
A
2.4
V
0.4
V
POWER SUPPLY CURRENTS
Parameter
Symbol
– 12
– 15
– 20
– 25
Unit
AC Active Supply Current (Iout = 0 mA, VCC = Max, f = fmax)
AC Standby Current (E = VIH, VCC = Max, f = fmax)
CMOS Standby Current (VCC = Max, f = 0 MHz, E
VCC – 0.2 V
Vin
VSS + 0.2 V, or
VCC – 0.2 V)
ICCA
ISB1
ISB2
140
135
130
125
mA
40
35
35
30
mA
20
20
20
20
mA
CAPACITANCE
(f = 1 MHz, dV = 3 V, TA = 25
°
C, Periodically sampled rather than 100% tested)
Characteristic
Symbol
Max
Unit
Address Input Capacitance
Cin
Cin
CI/O
6
pF
Control Pin Input Capacitance (E, G, W)
8
pF
I/O Capacitance
8
pF
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
This CMOS memory circuit has been de-
signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.
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