參數(shù)資料
型號: MCM6208CJ35R2
廠商: MOTOROLA INC
元件分類: SRAM
英文描述: 64K x 4 Fast Static RAM
中文描述: 64K X 4 STANDARD SRAM, 25 ns, PDSO24
封裝: 0.300 INCH, PLASTIC, SOJ-24
文件頁數(shù): 2/8頁
文件大小: 175K
代理商: MCM6208CJ35R2
MCM6208C
2
MOTOROLA FAST SRAM
TRUTH TABLE
(X = Don’t Care)
E
W
Mode
VCC Current
ISB1, ISB2
ICCA
ICCA
Output
Cycle
H
L
L
X
H
L
Not Selected
Read
Write
High–Z
Dout
High–Z
Read Cycle
Write Cycle
ABSOLUTE MAXIMUM RATINGS
(See Note)
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
Vin, Vout
– 0.5 to + 7.0
V
Voltage Relative to VSS For Any Pin
Except VCC
– 0.5 to VCC + 0.5
V
Output Current
Iout
PD
Tbias
TA
Tstg
±
20
mA
Power Dissipation
1.0
W
Temperature Under Bias
– 10 to + 85
°
C
Operating Temperature
0 to + 70
°
C
Storage Temperature — Plastic
– 55 to + 125
°
C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
10%, TA = 0 to 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage (Operating Voltage Range)
VCC
VIH
4.5
5.0
5.5
V
Input High Voltage
2.2
VCC + 0.3
**
V
Input Low Voltage
VIL
– 0.5
*
0.8
V
*VIL (min) = – 0.5 V dc; VIL (min) = – 2.0 V ac (pulse width
20 ns)
**VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2.0 V ac (pulse width
20 ns)
DC CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (E1 = VIH, Vout = 0 to VCC)
Standby Current (E
VCC – 0.2 V*, Vin
VSS + 0.2 V, or
VCC – 0.2 V,
VCC = Max, f = 0 MHz)
Ilkg(I)
Ilkg(O)
ISB2
±
1
μ
A
±
1
μ
A
20
mA
Output Low Voltage (IOL = 8.0 mA)
Output High Voltage (IOH = – 4.0 mA)
VOL
VOH
0.4
V
2.4
V
POWER SUPPLY CURRENTS
Parameter
Symbol
– 12
– 15
– 20
– 25
– 35
Unit
AC Supply Current (Iout = 0 mA, VCC = Max, f = fmax)
Standby Current (E = VIH, VCC = Max, f = fmax)
ICCA
ISB1
165
155
145
135
135
mA
55
50
45
40
40
mA
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
This CMOS memory circuit has been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear
feet per minute is maintained.
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