• 參數(shù)資料
    型號(hào): MCM6229BBEJ20
    廠商: MOTOROLA INC
    元件分類(lèi): SRAM
    英文描述: 256K x 4 Bit Static Random Access Memory
    中文描述: 256K X 4 STANDARD SRAM, 20 ns, PDSO28
    封裝: 0.300 INCH, SOJ-28
    文件頁(yè)數(shù): 1/8頁(yè)
    文件大小: 125K
    代理商: MCM6229BBEJ20
    MCM6229BB
    1
    Motorola, Inc. 1995
    Product Preview
    256K x 4 Bit Static Random
    Access Memory
    The MCM6229BB is a 1,048,576 bit static random access memory organized
    as 262,144 words of 4 bits. Static design eliminates the need for external clocks
    or timing strobes while CMOS circuitry reduces power consumption and provides
    for greater reliability.
    The MCM6229BB is equipped with both chip enable (E) and output enable (G)
    pins, allowing for greater system flexibility and eliminating bus contention problems.
    The MCM6229BB is available in 300 mil and 400 mil, 28 lead surface–mount
    SOJ packages.
    Single 5 V
    ±
    10% Power Supply
    Fast Access Times: 15/17/20/25/35 ns
    Equal Address and Chip Enable Access Times
    All Inputs and Outputs are TTL Compatible and LVTTL Compatible
    Three State Outputs
    Low Power Operation: 155/150/135/130/110 mA Maximum, Active AC
    BLOCK DIAGRAM
    MEMORY MATRIX
    512 ROWS x
    2048 COLUMNS
    ROW
    DECODER
    INPUT
    DATA
    CONTROL
    DQ
    DQ
    COLUMN I/O
    COLUMN DECODER
    A
    A
    A
    A
    A
    A
    A
    A
    E
    W
    G
    A
    A
    A
    A
    A
    A
    A
    A
    A
    A
    This document contains information on a new product under development. Motorola reserves the right to change or discontinue this product without notice.
    Order this document
    by MCM6229BB/D
    SEMICONDUCTOR TECHNICAL DATA
    PIN ASSIGNMENTS
    MCM6229BB
    PIN NAMES
    XJ PACKAGE
    400 MIL SOJ
    CASE 810–03
    19
    18
    17
    16
    15
    28
    27
    26
    25
    24
    23
    22
    21
    20
    A
    A
    A
    A
    A
    A
    A
    A
    A
    A
    A
    E
    G
    VSS
    VCC
    A
    A
    A
    A
    A
    A
    NC*
    DQ
    DQ
    DQ
    DQ
    A
    10
    11
    12
    13
    14
    1
    2
    3
    4
    5
    6
    7
    8
    9
    W
    A
    W
    G
    E
    DQ
    VCC
    VSS
    NC*
    Address Inputs
    Write Enable
    Output Enable
    Chip Enable
    Data Inputs/Outputs
    + 5 V Power Supply
    . . . . . . . . . . . . . . . . . . . .
    . . . . . . . . . . . . . . . . . . . . .
    . . . . . . . . . . . . . . . . . . .
    . . . . . . . . . . . . . . . . . . . . . .
    . . . . . . . . . . . . .
    . . . . . . . . . . . . .
    . . . . . . . . . . . . . . . . . . . . . . .
    . . . . . . . . . . . . . . . . .
    Ground
    No Connection
    *If not used for no connect, then do not ex-
    ceed voltages of – 0.5 to VCC + 0.5 V.
    This pin is used for manufacturing diag-
    nostics.
    EJ PACKAGE
    300 MIL SOJ
    CASE 810B–03
    11/7/96
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