- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄371087 > MCM63P736TQ133R (MOTOROLA INC) 128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM PDF資料下載
參數(shù)資料
| 型號(hào)： | MCM63P736TQ133R |
| 廠商： | MOTOROLA INC |
| 元件分類(lèi)： | SRAM |
| 英文描述： | 128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| 中文描述： | 128K X 36 CACHE SRAM, 4 ns, PQFP100 |
| 封裝： | TQFP-100 |
| 文件頁(yè)數(shù)： | 24/27頁(yè) |
| 文件大小： | 328K |
| 代理商： | MCM63P736TQ133R |
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)當(dāng)前第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)
MCM63P636
24
MOTOROLA FAST SRAM
STANDARD AND DEVICE SPECIFIC (PUBLIC) INSTRUCTION CODES
Instruction
Code*
Description
IDCODE
001**
Preloads ID register and places it between TDI and TDO. Does not affect RAM operation.
HIGH–Z
010
Captures I/O ring contents. Places the bypass register between TDI and TDO. Forces all DQ pins
to High–Z.
NOT IEEE 1149.1 COMPLIANT.
BYPASS
011
Places bypass register between TDI and TDO. Does not affect RAM operation.
NOT IEEE 1149.1
COMPLIANT.
SAMPLE/PRELOAD
100
Captures I/O ring contents. Places the boundary scan register between TDI and TDO. Does not
affect RAM operation.
Does not implement IEEE 1149.1 Preload function.
NOT IEEE 1149.1 COMPLIANT.
*Instruction codes expressed in binary, MSB on left, LSB on right.
**Default instruction automatically loaded when TRST asserted or in test–logic–reset state.
STANDARD (PRIVATE) INSTRUCTION CODES
Instruction
Code*
Description
NO OP
000
Do not use these instructions; they are reserved for future use.
NO OP
101
Do not use these instructions; they are reserved for future use.
NO OP
110
Do not use these instructions; they are reserved for future use.
NO OP
111
Do not use these instructions; they are reserved for future use.
* Instruction codes expressed in binary, MSB on left, LSB on right.
CAPTURE–DR
EXIT1–DR
EXIT2–DR
UPDATE–DR
CAPTURE–IR
EXIT1–IR
EXIT2–IR
UPDATE–IR
SHIFT–IR
PAUSE–IR
SHIFT–DR
PAUSE–DR
TEST–LOGIC
RESET
RUN–TEST/
IDLE
SELECT
DR–SCAN
SELECT
IR–SCAN
1
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
NOTE: The value adjacent to each state transition represents the signal present at TMS at the rising edge of TCK.
0
Figure 10. TAP Controller State Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM63P736TQ66 | 128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| MCM63P736ZP133R | 128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| MCM63P736ZP66R | 128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| MCM63P636ZP200 | Circular Connector; MIL SPEC:MIL-C-26482, Series I, Solder; Body Material:Aluminum; Series:PT07; Number of Contacts:3; Connector Shell Size:8; Connecting Termination:Solder; Circular Shell Style:Jam Nut Receptacle |
| MCM63P636ZP200R | Circular Connector; Body Material:Aluminum; Series:PT07; Number of Contacts:5; Connector Shell Size:18; Connecting Termination:Solder; Circular Shell Style:Jam Nut Receptacle; Circular Contact Gender:Pin; Insert Arrangement:18-5 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM63P736TQ66 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| MCM63P736TQ66R | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| MCM63P736ZP100 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| MCM63P736ZP100R | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
| MCM63P736ZP133 | 制造商:MOTOROLA 制造商全稱(chēng):Motorola, Inc 功能描述:128K x 36 and 256K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。