參數(shù)資料
型號: MCM6726DWJ10R
廠商: MOTOROLA INC
元件分類: SRAM
英文描述: 128K x 8 Bit Fast Static Random Access Memory
中文描述: 128K X 8 STANDARD SRAM, 10 ns, PDSO32
封裝: 0.400 INCH, PLASTIC, SOJ-32
文件頁數(shù): 6/7頁
文件大?。?/td> 117K
代理商: MCM6726DWJ10R
MCM6726D
6
MOTOROLA FAST SRAM
WRITE CYCLE 2
(E Controlled, See Notes 1 and 2)
6726D–8
6726D–10
6726D–12
Parameter
Symbol
Min
Max
Min
Max
Min
Max
Unit
Notes
Write Cycle Time
tAVAV
tAVEL
tAVEH
tELEH,
tELWH
8
10
12
ns
3
Address Setup Time
0
0
0
ns
Address Valid to End of Write
7
8
9
ns
Enable to End of Write
7
8
9
ns
4,5
Data Valid to End of Write
tDVEH
tEHDX
tEHAX
4
5
6
ns
Data Hold Time
0
0
0
ns
Write Recovery Time
0
0
0
ns
NOTES:
1. A write occurs during the overlap of E low and W low.
2. For common I/O applications, minimization or elimination of bus contention conditions is necessary during read and write cycles.
3. All write cycle timings are referenced from the last valid address to the first transitioning address.
4. If E goes low coincident with or after W goes low, the output will remain in a high impedance condition.
5. If E goes high coincident with or before W goes high, the output will remain in a high impedance condition.
WRITE CYCLE 2
tEHDX
tDVEH
tEHAX
tELWH
tELEH
tAVEL
tAVEH
DATA VALID
tAVAV
HIGH–Z
A (ADDRESS)
W (WRITE ENABLE)
E (CHIP ENABLE)
Q (DATA OUT)
D (DATA IN)
ORDERING INFORMATION
(Order by Full Part Number)
Motorola Memory Prefix
Part Number
Package (WJ = 400 mil SOJ)
Full Part Numbers — MCM6726DWJ8
MCM6726DWJ10
MCM6726DWJ10R
MCM6726DWJ12
MCM6726DWJ12R
MCM6726DWJ8R
Shipping Method (R = Tape and Reel, Blank = Rails)
Speed (8 = 8 ns, 10 = 10 ns, 12 = 12 ns)
MCM 6726D WJ
XX
X
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相關代理商/技術參數(shù)
參數(shù)描述
MCM6726DWJ12 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:128K x 8 Bit Fast Static Random Access Memory
MCM6726DWJ12R 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:128K x 8 Bit Fast Static Random Access Memory
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MCM6726DWJ8R 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:128K x 8 Bit Fast Static Random Access Memory
MCM6726WJ-12 制造商:Motorola Inc 功能描述: