MCM6726D
2
MOTOROLA FAST SRAM
TRUTH TABLE
(X = Don’t Care)
E
G
W
Mode
VCC Current
ISB1, ISB2
ICCA
ICCA
ICCA
Output
Cycle
H
X
X
Not Selected
High–Z
—
L
H
H
Output Disabled
High–Z
—
L
L
H
Read
Dout
High–Z
Read Cycle
L
X
L
Write
Write Cycle
ABSOLUTE MAXIMUM RATINGS
(See Note)
Rating
Symbol
Value
Unit
Power Supply Voltage
VCC
– 0.5 to + 7.0
V
Voltage Relative to VSS for Any Pin Except
VCC
Vin, Vout
– 0.5 to VCC + 0.5
V
Output Current
Iout
±
30
mA
Power Dissipation
PD
1.2
W
Temperature Under Bias
Tbias
– 10 to + 85
°
C
Operating Temperature
TA
0 to + 70
°
C
Storage Temperature — Plastic
Tstg
– 55 to + 125
°
C
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
10%, TA = 0 to 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage (Operating Voltage Range)
VCC
VIH
4.5
5.0
5.5
V
Input High Voltage
2.2
—
VCC + 0.3
**
V
Input Low Voltage
VIL
– 0.5
*
—
0.8
V
*VIL (min) = –0.5 V dc; VIL (min) = –2.0 V ac (pulse width
≤
2.0 ns) for I
≤
20.0 mA.
**VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width
≤
2.0 ns) for I
≤
20.0 mA.
DC CHARACTERISTICS
Parameter
Symbol
Min
Max
Unit
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (E = VIH, Vout = 0 to VCC)
Output Low Voltage (IOL = + 8.0 mA)
Output High Voltage (IOH = – 4.0 mA)
Ilkg(I)
Ilkg(O)
VOL
VOH
—
±
1.0
μ
A
—
±
1.0
μ
A
—
0.4
V
2.4
—
V
POWER SUPPLY CURRENTS
Parameter
Symbol
6726D–8
6726D–10
6726D–12
Unit
Notes
AC Active Supply Current (Iout = 0 mA) (VCC = max, f = fmax)
Active Quiescent Current (E = VIL, VCC = max, f = 0 MHz)
AC Standby Current (E = VIH, VCC = max, f = fmax)
CMOS Standby Current (VCC = max, f = 0 MHz, E
≥
VCC – 0.2 V,
Vin
≤
VSS + 0.2 V, or
≥
VCC – 0.2 V)
NOTES:
1. Reference AC Operating Conditions and Characteristics for input and timing (VIH/VIL, tr/tf, pulse level 0 to 3.0 V, VIH = 3.0 V).
2. All addresses transition simultaneously low (LSB) and then high (MSB).
3. Data states are all zero.
ICCA
ICC2
ISB1
ISB2
195
175
165
mA
1, 2, 3
100
100
100
mA
60
60
60
mA
1, 2, 3
20
20
20
mA
This device contains circuitry to protect the
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid appli-
cation of any voltage higher than maximum
rated voltages to these high–impedance cir-
cuits.
This BiCMOS memory circuit has been de-
signed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The circuit is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear feet
per minute is maintained.