參數(shù)資料
型號: MCM6729CWJ7R
廠商: MOTOROLA INC
元件分類: DRAM
英文描述: 256K x 4 Bit Fast Static Random Access Memory
中文描述: 256K X 4 STANDARD SRAM, 7 ns, PDSO32
封裝: 0.400 INCH, PLASTIC, SOJ-32
文件頁數(shù): 1/7頁
文件大?。?/td> 111K
代理商: MCM6729CWJ7R
MCM6729C
1
Motorola, Inc. 1996
256K x 4 Bit Fast Static Random
Access Memory
The MCM6729C is a 1,048,576 bit static random access memory organized
as 262,144 words of 4 bits. Static design eliminates the need for external clocks
or timing strobes.
Output enable (G) is a special control feature that provides increased system
flexibility and eliminates bus contention problems.
This device meets JEDEC standards for functionality and revolutionary pinout,
and is available in a 400 mil plastic small–outline J–leaded package.
Single 5 V
±
10% Power Supply
Fully Static — No Clock or Timing Strobes Necessary
All Inputs and Outputs Are TTL Compatible
Three State Outputs
Fast Access Times: 6, 7 ns
Center Power and I/O Pins for Reduced Noise
BLOCK DIAGRAM
ROW
DECODER
MEMORY
MATRIX
512 ROWS x 512 x 4
COLUMNS
INPUT
DATA
CONTROL
COLUMN I/O
COLUMN DECODER
A
A
A
A
A
A
A
A
DQ
A
A
A
A
A
E
W
G
VCC
VSS
A
A
A
A
DQ
A
Order this document
by MCM6729C/D
SEMICONDUCTOR TECHNICAL DATA
PIN ASSIGNMENT
MCM6729C
WJ PACKAGE
400 MIL SOJ
CASE 857A–01
32
31
30
29
28
27
26
25
24
23
22
21
2
3
1
5
6
4
7
9
10
8
12
13
11
14
20
15
16
19
18
17
A
A
A
A
E
A
W
A
A
A
VCC
VSS
A
A
A
A
DQ
A
G
DQ
A
A
A
A
VCC
VSS
DQ
DQ
NC
A
NC
NC
A
E
W
G
DQ
VCC
VSS
NC
Address Input
Chip Enable
Write Enable
Output Enable
Data Input/Output
+ 5 V Power Supply
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Ground
No Connection
PIN NAMES
REV 3
10/9/96
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