參數(shù)資料
型號(hào): MCM69P618CTQ5R
廠商: MOTOROLA INC
元件分類: SRAM
英文描述: 64K x 18 Bit Pipelined BurstRAM Synchronous Fast Static RAM
中文描述: 64K X 18 CACHE SRAM, 5 ns, PQFP100
封裝: TQFP-100
文件頁(yè)數(shù): 7/12頁(yè)
文件大?。?/td> 205K
代理商: MCM69P618CTQ5R
MCM69P618C
7
MOTOROLA FAST SRAM
DC OPERATING CONDITIONS AND CHARACTERISTICS
(VDD = 3.3 V + 10%, – 5%, TA = 0 to 70
°
C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
(Voltages Referenced to VSS = 0 V)
Parameter
Symbol
Min
Typ
Max
Unit
Supply Voltage
VDD
VIL
VIH
3.135
3.3
3.6
V
Input Low Voltage
– 0.5*
0.8
V
Input High Voltage
2
5.5**
V
*VIL
– 2 V for t
tKHKH/2.
**VIH
6 V for t
tKHKH/2.
DC CHARACTERISTICS AND SUPPLY CURRENTS
Parameter
Symbol
Min
Max
Unit
Notes
Input Leakage Current (0 V
Vin
VDD) (Excluding LBO)
Output Leakage Current (0 V
Vin
VDD)
AC Supply Current (Device Selected, All Outputs Open,
Cycle Time
tKHKH min)
Ilkg(I)
Ilkg(O)
IDDA
±
1
μ
A
±
1
μ
A
MCM69P618C–4
MCM69P618C–4.5
MCM69P618C–5
MCM69P618C–6
MCM69P618C–7
300
295
275
260
255
mA
1, 2, 3
CMOS Standby Supply Current (Deselected, Clock (K
)
Cycle Time
tKHKH, All Inputs Toggling at CMOS
Levels Vin
VSS + 0.2 V or
VDD – 0.2 V)
MCM69P618C–4
MCM69P618C–4.5
MCM69P618C–5
MCM69P618C–6
MCM69P618C–7
ISB1
160
155
130
110
105
mA
4
Clock Running Supply Current (Deselected, Clock (K
)
Cycle Time
tKHKH, All Other Inputs Held to Static
CMOS Levels Vin
VSS + 0.2 V or
VDD – 0.2 V)
MCM69P618C–4
MCM69P618C–4.5
MCM69P618C–5
MCM69P618C–6
MCM69P618C–7
ISB2
50
50
45
40
40
mA
4
Output Low Voltage (IOL = 8 mA)
Output High Voltage (IOH = – 4 mA)
NOTES:
1. Reference AC Operating Conditions and Characteristics for input and timing.
2. All addresses transition simultaneously low (LSB) and then high (MSB).
3. Data states are all zero.
4. Device in Deselected mode as defined by the Truth Table.
VOL
VOH
0.4
V
2.4
V
CAPACITANCE
(f = 1.0 MHz, dV = 3.0 V, TA = 25
°
C, Periodically Sampled Rather Than 100% Tested)
Parameter
Symbol
Min
Typ
Max
Unit
Input Capacitance
Cin
CI/O
4
6
pF
Input/Output Capacitance
7
9
pF
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