- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄371094 > MCM69R819AZP6R (MOTOROLA INC) 4M Late Write LVTTL PDF資料下載
參數(shù)資料
| 型號： | MCM69R819AZP6R |
| 廠商： | MOTOROLA INC |
| 元件分類： | DRAM |
| 英文描述： | 4M Late Write LVTTL |
| 中文描述： | 256K X 18 LATE-WRITE SRAM, 3 ns, PBGA119 |
| 封裝： | 14 X 22 MM, 1.27 MM PITCH, PLASTIC, BGA-119 |
| 文件頁數(shù)： | 8/20頁 |
| 文件大?。?/td> | 212K |
| 代理商： | MCM69R819AZP6R |
MCM69R737A
MCM69R819A
8
MOTOROLA FAST SRAM
The table of timing values shows either a
minimum or a maximum limit for each param-
eter. Input requirements are specified from
the external system point of view. Thus, ad-
dress setup time is shown as a minimum
since the system must supply at least that
much time (even though most devices do not
require it). On the other hand, responses from
the memory are specified from the device
point of view. Thus, the access time is shown
as a maximum since the device never pro-
vides data later than that time.
TIMING LIMITS
DEVICE
UNDER
TEST
50
50
VDDQ/2
Figure 1. AC Test Load
VOH
VSS
50%
100%
20% tKHKH
Figure 2. Undershoot Voltage
CROSSING POINT
VDDQ
VSS
VTR
VDIF
VCP
VCM*
Figure 3. Differential Inputs/Common Mode Input Voltage
*VCM, the Common Mode Input Voltage, equals VTR – ((VTR – VCP)/2).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MCM69R819AZP7 | 4M Late Write LVTTL |
| MCM69R819AZP8 | 4M Late Write LVTTL |
| MCM69R819AZP8R | 4M Late Write LVTTL |
| MCM69R818AZP6R | 4M Late Write HSTL |
| MCM69R736AZP5 | 4M Late Write HSTL |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MCM69R819AZP7 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write LVTTL |
| MCM69R819AZP7R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write LVTTL |
| MCM69R819AZP8 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write LVTTL |
| MCM69R819AZP8R | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write LVTTL |
| MCM69R820AZP5 | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:4M Late Write 2.5 V I/O |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。